ALXD800EEXJ2VD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD C3 Datasheet - Page 112

• Manufacturer Part Number: ALXD800EEXJ2VD C3
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VD C3

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

5.5.2.4
MSR Address
Type
Reset Value
SYS_CS_MSR is used by the SYSENTER instruction (fast system call) as the selector of the most privileged code seg-
ment. SYS_CS plus 8 is used by SYSENTER as the selector of the most privileged stack segment. SYS_CS plus 16 is
used by SYSEXIT as the selector of the least privileged code segment. SYS_CS plus 24 is used by SYSEXIT as the selec-
tor of the least privileged stack segment.
112
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
G
63:32
29:24
22:21
15:3
Bit
1:0
31
30
23
20
19
18
17
16
2
D
SYSENTER/SYSEXIT Code Segment Selector MSR (SYS_CS_MSR)
Name
RSVD
G (RO)
D (RO)
RSVD (RO)
P (RO)
DPL (RO)
S (RO)
X (RO)
C (RO)
R (RO)
A (RO)
CS_SEL
TI
RPL (RO)
RSVD
00000174h
R/W
00000000_C09B0000h
33234H
P
Description
Reserved.
Granularity (Read Only). Code segment limit granularity is 4 KB. (Default = 1)
Default (Read Only). Code segment default size is 32 bits. (Default = 1)
Reserved (Read Only).
Present (Read Only). Code segment descriptor is present. (Default = 1)
Descriptor Privilege Level (Read Only). Code segment descriptor privilege level.
(Default = 11)
Segment (Read Only). Code segment is not a system segment. (Default = 1)
Executable (Read Only). Code segment is executable. (Default = 1)
Conforming (Read Only). Code segment is conforming. (Default = 0)
Readable (Read Only). Code segment is readable. (Default = 1)
Accessed (Read Only). Code segment was accessed. (Default = 1)
Code Segment Selector. (Default = 0)
Descriptor Table Indicator. (Default = 0)
Requestor Privilege Level (Read Only). (Default = 0)
DPL
SYS_CS_MSR Bit Descriptions
S
SYS_CS_MSR Register Map
X
C
R
RSVD
A
CS_SEL
AMD Geode™ LX Processors Data Book
9
8
CPU Core Register Descriptions
7
6
5
4
3
TI
2
1
RPL
0