NH82801DB S L8DE Intel, NH82801DB S L8DE Datasheet - Page 564

• Manufacturer Part Number: NH82801DB S L8DE
• Manufacturer: Intel

Specifications of NH82801DB S L8DE

• Lead Free Status / RoHS Status: Compliant

Register Index
Table A-1. Intel
564
ACPI Control
BIOS Control Register
TCO Control
GPIO Base Address Register
GPIO Control Register
PIRQ[A:D] Routing Control
Serial IRQ Control Register
PIRQ[E:H] Routing Control
Device 31 Error Config Register
Device 31 Error Status Register
PCI DMA Configuration Registers
General Control
General Status
Backed Up Control
Real Time Clock Configuration
LPC COM Port Decode Ranges
LPC FDD & LPT Decode Ranges
LPC Sound Decode Ranges
FWH Decode Enable 1 Register
LPC Generic Decode Range 1
LPC Enables
FWH Select 1 Register
LPC Generic Decode Range 2
Register Name
®
ICH4 PCI Configuration Registers (Sheet 4 of 10)
ECh–EDh
D0h–D3h
E4h–E5h
E6h–E7h
4E–4Fh
58–5Bh
68–6Bh
60–63h
90–91h
Offset
5Ch
8Ah
D4h
D5h
D8h
E0h
E1h
E2h
E3h
E8h
44h
54h
64h
88h
Section 9.1.11, “ACPI_CNTL—ACPI Control (LPC I/F — D31:F0)” on
page 9-296
Section 9.1.12, “BIOS_CNTL—BIOS Control Register (LPC I/F—D31:F0)”
on page 9-297
Section 9.1.13, “TCO_CNTL — TCO Control (LPC I/F — D31:F0)” on
page 9-297
Section 9.1.14, “GPIOBASE—GPIO Base Address (LPC I/F—D31:F0)” on
page 9-298
Section 9.1.15, “GPIO_CNTL—GPIO Control (LPC I/F—D31:F0)” on
page 9-298
Section 9.1.16, “PIRQ[n]_ROUT—PIRQ[A,B,C,D] Routing Control (LPC I/
F—D31:F0)” on page 9-298
Section 9.1.17, “SERIRQ_CNTL—Serial IRQ Control (LPC I/F—D31:F0)”
on page 9-299
Section 9.1.18, “PIRQ[n]_ROUT—PIRQ[E,F,G,H] Routing Control (LPC I/
F—D31:F0)” on page 9-299
Section 9.1.19, “D31_ERR_CFG—Device 31 Error Configuration Register
(LPC I/F—D31:F0)” on page 9-300
Section 9.1.20, “D31_ERR_STS—Device 31 Error Status Register (LPC I/
F—D31:F0)” on page 9-300
Section 9.1.21, “PCI_DMA_CFG—PCI DMA Configuration (LPC I/F—
D31:F0)” on page 9-301
Section 9.1.22, “GEN_CNTL — General Control Register (LPC I/F —
D31:F0)” on page 9-302
Section 9.1.23, “GEN_STA—General Status Register (LPC I/F—D31:F0)”
on page 9-304
Section 9.1.24, “BACK_CNTL—Backed Up Control Register (LPC I/F—
D31:F0)” on page 9-304
Section 9.1.25, “RTC_CONF—RTC Configuration Register (LPC I/F—
D31:F0)” on page 9-305
Section 9.1.26, “COM_DEC—LPC I/F Communication Port Decode
Ranges (LPC I/F—D31:F0)” on page 9-305
Section 9.1.27, “FDD/LPT_DEC—LPC I/F FDD & LPT Decode Ranges
(LPC I/F—D31:F0)” on page 9-306
Section 9.1.28, “SND_DEC—LPC I/F Sound Decode Ranges (LPC I/F—
D31:F0)” on page 9-306
Section 9.1.29, “FWH_DEC_EN1—FWH Decode Enable 1 Register (LPC
I/F—D31:F0)” on page 9-307
Section 9.1.30, “GEN1_DEC—LPC I/F Generic Decode Range 1 Register
(LPC I/F—D31:F0)” on page 9-308
Section 9.1.31, “LPC_EN—LPC I/F Enables Register (LPC I/F—D31:F0)”
on page 9-308
Section 9.1.32, “FWH_SEL1—FWH Select 1 Register (LPC I/F—D31:F0)”
on page 9-310
Section 9.1.33, “GEN2_DEC—LPC I/F Generic Decode Range 2 Register
(LPC I/F—D31:F0)” on page 9-311
Datasheet Location
Intel
®
82801DB ICH4 Datasheet