NH82801DB S L8DE Intel, NH82801DB S L8DE Datasheet - Page 386
NH82801DB S L8DE
Manufacturer Part Number
NH82801DB S L8DE
Description
Manufacturer
Intel
Datasheet
1.NH82801DB_S_L8DE.pdf
(587 pages)
Specifications of NH82801DB S L8DE
Lead Free Status / RoHS Status
Compliant
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IDE Controller Registers (D31:F1)
10.1.6
10.1.7
10.1.8
386
PI — Programming Interface Register (IDE—D31:F1)
Address Offset:
Default Value:
SCC — Sub Class Code Register (IDE—D31:F1)
Address Offset:
Default Value:
BCC — Base Class Code Register (IDE—D31:F1)
Address Offset:
Default Value:
Bit
6:4
Bit
7:0
Bit
7:0
7
3
2
1
0
This read-only bit is a 1 to indicate that the ICH4 supports bus master operation
Reserved. Will always return 0.
SOP_MODE_CAP — RO. This read-only bit is a 1 to indicate that the secondary controller supports
both legacy and native modes.
SOP_MODE_SEL — R/W. This read/write bit determines the mode that the secondary IDE channel
is operating in.
0 = Legacy-PCI mode (default)
1 = Native-PCI mode
POP_MODE_CAP — RO. This read-only bit is a 1 to indicate that the primary controller supports
both legacy and native modes.
POP_MODE_SEL — R/W. This read/write bit determines the mode that the primary IDE channel is
operating in.
0 = Legacy-PCI mode (default)
1 = Native-PCI mode
Sub Class Code — RO.
01h = IDE device, in the context of a mass storage device.
Base Class Code — RO.
01 = Mass storage device
09h
8Ah
0Ah
01h
0Bh
01h
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
R/W
8 bits
RO
8 bits
RO
8 bits
Intel
®
82801DB ICH4 Datasheet
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