EV2A16AVNYU35 E2V, EV2A16AVNYU35 Datasheet - Page 9

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EV2A16AVNYU35

Manufacturer Part Number
EV2A16AVNYU35
Description
Manufacturer
E2V
Datasheet

Specifications of EV2A16AVNYU35

Lead Free Status / RoHS Status
Supplier Unconfirmed
Table 2-9.
Notes:
e2v semiconductors SAS 2009
Parameter
Write cycle time
Address set-up time
Address valid to end of write (G high)
Address valid to end of write (G low)
Enable to end of write (G high)
Enable to end of write (G low)
Data valid to end of write
Data hold time
Write recovery time
1. A write occurs during the overlap of E low and W low.
2. Power supplies must be properly grounded and decoupled and bus contention conditions must be minimized or eliminated
3. If G goes low at the same time or after W goes low, the output will remain in a high-impedance state.
4. After W, E, or UB/LB has been brought high, the signal must remain in steady-state high for a minimum of 2 ns.
5. The minimum time between E being asserted low in one cycle to E being asserted low in a subsequent cycle is the same as
6. All write cycle timings are referenced from the last valid address to the first transition address.
7. If E goes low at the same time or after W goes low, the output will remain in a high-impedance state.
8. If E goes high at the same time or before W goes high, the output will remain in a high-impedance state.
during read and write cycles.
the minimum cycle time allowed for the device.
(6)
Write Cycle Timing 2 (E Controlled)
Figure 2-4.
LB, UB (Byte Enable)
W (Write Enable)
E (Chip Enable)
(7)(8)
Q (Data Out)
A (Address)
D (Data In)
Write Cycle 1 (W Controlled)
Hi-Z
(1)(2)(3)(4)(5)
t
AVWL
Symbol
t
t
t
t
t
t
t
t
t
t
t
ELWH
ELWH
EHDX
AVEH
AVEH
ELEH
ELEH
DVEH
EHAX
AVAV
AVEL
t
WLQZ
t
t
AVWH
AVAV
Min
35
18
20
15
15
10
12
0
0
t
t
WLEH
WLWH
Data Valid
Hi-Z
t
DVWH
Max
0918B–HIREL–06/09
t
WHDX
t
WHQX
t
WHAX
EV2A16A
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
9

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