EV2A16AVNYU35 E2V, EV2A16AVNYU35 Datasheet - Page 10

• Manufacturer Part Number: EV2A16AVNYU35
• Manufacturer: E2V

Specifications of EV2A16AVNYU35

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Figure 2-5.
10
LB, UB (Byte Enable)
0918B–HIREL–06/09
W (Write Enable)
E (Chip Enable)
Q (Data Out)
A (Address)
D (Data In)
Write Cycle 2 (E Controlled)
Table 2-10.
Notes:
Parameter
Write cycle time
Address set-up time
Address valid to end of write (G high)
Address valid to end of write (G low)
Byte pulse width (G high)
Byte pulse width (G low)
Data valid to end of write
Data hold time
Write recover time
1. A write occurs during the overlap of E low and W low.
2. Power supplies must be properly grounded and decoupled and bus contention conditions must be mini-
3. If G goes low at the same time or after W goes low, the output will remain in a high-impedance state.
4. After W, E, or UB/LB has been brought high, the signal must remain in steady-state high for a minimum
5. If both byte control signals are asserted, the two signals must have no more than 2 ns skew between
6. The minimum time between E being asserted low in one cycle to E being asserted low in a subsequent
7. All write cycle timings are referenced from the last valid address to the first transition address.
mized or eliminated during read and write cycles.
of 2 ns.
them.
cycle is the same as the minimum cycle time allowed for the device.
Write Cycle Timing 3 (LB/UB Controlled)
(7)
t
AVEL
t
t
AVAV
AVEH
Hi-Z
Symbol
t
t
t
t
t
t
t
t
t
t
t
BLWH
BLWH
AVBH
AVBH
BLEH
BLEH
DVBH
BHDX
BHAX
AVAV
AVBL
(1)(2)(3)(4)(5)(6)
t
ELEH
t
Min
ELWH
35
18
20
15
15
10
12
0
0
Data Valid
t
DVEH
e2v semiconductors SAS 2009
Max
–
–
–
–
–
–
–
–
–
t
EHDX
EV2A16A
t
EHAX
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns