EV2A16AVNYU35 E2V, EV2A16AVNYU35 Datasheet - Page 8

• Manufacturer Part Number: EV2A16AVNYU35
• Manufacturer: E2V

Specifications of EV2A16AVNYU35

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Figure 2-3.
2.5
Table 2-8.
Notes:
8
Parameter
Write cycle time
Address set-up time
Address valid to end of write (G high)
Address valid to end of write (G low)
Write pulse width (G high)
Write pulse width (G low)
Data valid to end of write
Data hold time
Write low to data Hi-Z
Write high to output active
Write recovery time
LB, UB (Byte Enable)
Write Mode
1. A write occurs during the overlap of E low and W low.
2. Power supplies must be properly grounded and decoupled and bus contention conditions must be minimized or eliminated
3. If G goes low at the same time or after W goes low, the output will remain in a high-impedance state.
4. After W, E, or UB/LB has been brought high, the signal must remain in steady-state high for a minimum of 2 ns.
5. The minimum time between E being asserted low in one cycle to E being asserted low in a subsequent cycle is the same as
6. All write cycle timings are referenced from the last valid address to the first transition address.
7. This parameter is sampled and not 100% tested.
8. Transition is measured ±200 mV from steady-state voltage.
9. At any given voltage or temperature, t
0918B–HIREL–06/09
G (Output Enable)
E (Chip Enable)
during read and write cycles.
the minimum cycle time allowed for the device.
Q (Data Out)
A (Address)
(6)
Read Cycle 2
Write Cycle Timing 1 (W Controlled)
(7)(8)(9)
(7)(8)(9)
WLQZ
t
AVQV
max < t
(1)(2)(3)(4)(5)
t
ELQX
t
t
BLQX
GLQX
t
WLWH
Symbol
WHQX
t
t
t
t
t
t
t
t
t
t
t
WLWH
WHDX
WHQX
AVWH
AVWH
WLEH
DVWH
WLQZ
WHAX
AVWL
AVAV
t
ELQV
/t
WLEH
min.
t
t
GLQV
BLQV
t
AVAV
Min
35
18
20
15
15
10
12
0
0
0
3
Data Valid
Max
12
–
–
–
–
–
–
–
–
–
–
t
BHQZ
t
e2v semiconductors SAS 2009
t
GHQZ
EHQZ
EV2A16A
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns