M393T5750EZA-CE6 Samsung Semiconductor, M393T5750EZA-CE6 Datasheet - Page 22

• Manufacturer Part Number: M393T5750EZA-CE6
• Manufacturer: Samsung Semiconductor

Specifications of M393T5750EZA-CE6

• Lead Free Status / RoHS Status: Compliant

RDIMM
Four Activate Window for 1KB page size products
Four Activate Window for 2KB page size products
CAS to CAS command delay
Write recovery time
Auto precharge write recovery + precharge time
Internal write to read command delay
Internal read to precharge command delay
Exit self refresh to a non-read command
Exit self refresh to a read command
Exit precharge power down to any non-read command
Exit active power down to read command
Exit active power down to read command
(slow exit, lower power)
CKE minimum pulse width (HIGH and LOW pulse width)
ODT turn-on delay
ODT turn-on
ODT turn-on (Power-Down mode)
ODT turn-off delay
ODT turn-off
ODT turn-off (Power-Down mode)
ODT to power down entry latency
ODT power down exit latency
OCD drive mode output delay
Minimum time clocks remains ON after CKE asynchronously
drops LOW
Parameter
tFAW
tFAW
tCCD
tWR
tDAL
tWTR
tRTP
tXSNR
tXSRD
tXP
tXARD
tXARDS
tCKE
tAOND
tAON
tAONPD
tAOFD
tAOF
tAOFPD
tANPD
tAXPD
tOIT
tDelay
Symbol
22 of 26
tIS+tCK+tIH
tAC(min)+2
tAC(min)+2
tRFC + 10
WR+tRP
tAC(min)
tAC(min)
6 - AL
min
37.5
200
7.5
7.5
2.5
50
15
2
2
3
2
3
8
0
2
DDR2-533
tAC(max)+1
tAC(max)+1
tAC(max)+1
tAC(max)
2.5tCK+
2tCK+
+ 0.6
max
2.5
12
x
x
x
x
x
x
x
x
x
x
x
x
x
2
x
x
x
tIS+tCK+tIH
tAC(min)+2
tAC(min)+2
tRFC + 10
tAC(min)
tAC(min)
WR+tRP
6 - AL
37.5
min
200
7.5
2.5
50
15
10
2
2
3
2
3
8
0
2
DDR2-400
tAC(max)+1
tAC(max)+1
tAC(max)+1
tAC(max)
2.5tCK+
2tCK+
+ 0.6
max
2.5
12
Rev. 1.4 August 2008
2
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
DDR2 SDRAM
Units
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
17,44
17,44
1,2
14
24
27
16
16
32
15
3
1