M393T5750EZA-CE6 Samsung Semiconductor, M393T5750EZA-CE6 Datasheet - Page 18

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M393T5750EZA-CE6

Manufacturer Part Number
M393T5750EZA-CE6
Description
Manufacturer
Samsung Semiconductor
Datasheet

Specifications of M393T5750EZA-CE6

Lead Free Status / RoHS Status
Compliant
13.0 Electrical Characteristics & AC Timing for DDR2-800/667/533/400
13.1 Refresh Parameters by Device Density
13.2 Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin
12.0 Input/Output Capacitance
* DM is internally loaded to match DQ and DQS identically.
RDIMM
Refresh to active/Refresh command time
Average periodic refresh interval
Input capacitance, CK and CK
Input capacitance, CKE and CS
Input capacitance, Address, RAS,CAS,WE
Input/output capacitance, DQ, DM, DQS, DQS
Bin
(0 °C < T
(CL - tRCD - tRP)
Parameter
tCK, CL=3
tCK, CL=4
tCK, CL=5
tCK, CL=6
Speed
tRCD
tRAS
tRP
tRC
OPER
Parameter
Part-Number
Parameter
< 95 °C; V
3.75
min
2.5
15
15
60
45
DDQ
3
DDR2-800(F7)
-
6 - 6 - 6
= 1.8V + 0.1V; V
70000
tREFI
max
8
8
8
-
-
-
-
CCK
CI1
CI2
CIO
Symbol
DD
3.75
min
85 °C < T
0 °C ≤ T
15
15
60
45
= 1.8V + 0.1V)
Symbol
DDR2-667(E6)
5
3
-
M393T6553EZA
M393T6553EZ3
tRFC
Min
5 - 5 - 5
-
-
-
-
CASE
CASE
18 of 26
70000
max
Max
≤ 85°C
11
12
12
10
≤ 95°C
8
8
8
-
-
-
-
M393T2953EZA
M393T2953EZ3
Min
-
-
-
-
3.75
3.75
min
256Mb
15
15
60
45
DDR2-533(D5)
5
-
7.8
3.9
75
4 - 4 - 4
Max
11
12
12
10
70000
512Mb
max
105
7.8
3.9
8
8
8
-
-
-
-
M393T2950EZA
M393T2950EZ3
Min
-
-
-
-
(V
127.5
1Gb
7.8
3.9
DD
min
Max
15
15
55
40
11
12
12
10
DDR2-400(CC)
5
5
-
-
Rev. 1.4 August 2008
=1.8V, V
3 - 3 - 3
DDR2 SDRAM
2Gb
195
M393T5750EZA
7.8
3.9
M393T5750EZ3
Min
-
-
-
-
70000
DDQ
max
8
8
-
-
-
-
-
=1.8V, T
327.5
4Gb
7.8
3.9
Max
11
12
12
10
Units
A
ns
ns
ns
ns
ns
ns
ns
ns
=25
Units
Units
ns
µs
µs
pF
o
C)

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