PIC18F46K80T-I/ML Microchip Technology, PIC18F46K80T-I/ML Datasheet - Page 103
![ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 44 QFN 8x8x0.9mm T/R](/photos/39/70/397090/qfn-44_sml.jpg)
PIC18F46K80T-I/ML
Manufacturer Part Number
PIC18F46K80T-I/ML
Description
ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 44 QFN 8x8x0.9mm T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K80-ISO.pdf
(628 pages)
Specifications of PIC18F46K80T-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18F46K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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TABLE 5-4:
2011 Microchip Technology Inc.
BRGCON2
BRGCON1
TXERRCNT
RXERRCNT
Legend:
Note 1:
Register
2:
3:
4:
5:
6:
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware
stack.
See
Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not
enabled as PORTA pins, they are disabled and read ‘0’.
This register reads all ‘0’s until the ECAN™ technology is set up in Mode 1 or Mode 2.
Table 5-3
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
PIC18F2XK80
PIC18F2XK80
PIC18F2XK80
PIC18F2XK80
for Reset value for specific condition.
Applicable Devices
PIC18F4XK80
PIC18F4XK80
PIC18F4XK80
PIC18F4XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
PIC18F6XK80
Preliminary
PIC18F66K80 FAMILY
0000 0000
0000 0000
0000 0000
0000 0000
Brown-out
Power-on
Reset,
Reset
RESET Instruction,
MCLR Resets,
Stack Resets
WDT Reset,
0000 0000
0000 0000
0000 0000
0000 0000
DS39977C-page 103
Wake-up via
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
or Interrupt
WDT
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