PIC16LF737-I/ML Microchip Technology, PIC16LF737-I/ML Datasheet - Page 95
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC16LF737-I/ML
Manufacturer Part Number
PIC16LF737-I/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Specifications of PIC16LF737-I/ML
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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10.0
10.1
The Master Synchronous Serial Port (MSSP) module is
a serial interface, useful for communicating with other
peripheral or microcontroller devices. These peripheral
devices may be serial EEPROMs, shift registers,
display drivers, A/D converters, etc. The MSSP module
can operate in one of two modes:
• Serial Peripheral Interface (SPI™)
• Inter-Integrated Circuit (I
The I
hardware:
• Master mode
• Multi-Master mode
• Slave mode
10.2
The MSSP module has three associated registers.
These include a status register (SSPSTAT) and two
control registers (SSPCON and SSPCON2). The use
of these registers and their individual configuration bits
differ significantly, depending on whether the MSSP
module is operated in SPI or I
Additional details are provided under the individual
sections.
10.3
The SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. All four modes
of SPI are supported. To accomplish communication,
typically three pins are used:
• Serial Data Out (SDO) – RC5/SDO
• Serial Data In (SDI) – RC4/SDI/SDA
• Serial Clock (SCK) – RC3/SCK/SCL
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SS) – RA5/AN4/LVDIN/SS/C2OUT
Figure 10-1 shows the block diagram of the MSSP
module when operating in SPI mode.
2004 Microchip Technology Inc.
- Full Master mode
- Slave mode (with general address call)
2
C interface supports the following modes in
MASTER SYNCHRONOUS
SERIAL PORT (MSSP)
MODULE
Master SSP (MSSP) Module
Overview
Control Registers
SPI Mode
2
C™)
2
C mode.
FIGURE 10-1:
LVDIN/SS/
RC5/SDO
RA5/AN4/
RC4/SDI/
C2OUT
RC3/
SCK/
SDA
SCL
Read
Peripheral OE
Select
SS Control
SMP:CKE
Edge
bit 0
Select
Edge
MSSP BLOCK DIAGRAM
(SPI™ MODE)
Enable
TRIS bit
SSPBUF Reg
Data to TX/RX in SSPSR
PIC16F7X7
2
SSPSR Reg
SSPM3:SSPM0
Clock Select
4
2
DS30498C-page 93
(
Prescaler
4, 16, 64
TMR2 Output
Write
Clock
Shift
Data Bus
Internal
2
T
OSC
)
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