PIC16LF737-I/ML Microchip Technology, PIC16LF737-I/ML Datasheet - Page 198
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC16LF737-I/ML
Manufacturer Part Number
PIC16LF737-I/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Specifications of PIC16LF737-I/ML
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC16F7X7
CALL
Syntax:
Operands:
Operation:
Status Affected:
Description:
CLRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
CLRW
Syntax:
Operands:
Operation:
Status Affected:
Description:
DS30498C-page 196
Call Subroutine
[ label ] CALL k
0
(PC) + 1
k
(PCLATH<4:3>)
None
Call subroutine. First, return
address (PC + 1) is pushed onto
the stack. The eleven-bit
immediate address is loaded into
PC bits<10:0>. The upper bits of
the PC are loaded from PCLATH.
CALL is a two-cycle instruction.
Clear W
[ label ] CLRW
None
00h
1
Z
W register is cleared. Zero bit (Z)
is set.
Clear f
[ label ] CLRF
0
00h
1
Z
The contents of register ‘f’ are
cleared and the Z bit is set.
k
f
PC<10:0>,
Z
Z
(W)
2047
127
(f)
TOS,
f
PC<12:11>
CLRWDT
Syntax:
Operands:
Operation:
Status Affected:
Description:
COMF
Syntax:
Operands:
Operation:
Status Affected:
Description:
DECF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Complement f
[ label ] COMF
0
d
(f)
Z
The contents of register ‘f’ are
complemented. If ‘d’ is ‘0’, the
result is stored in W. If ‘d’ is ‘1’, the
result is stored back in register ‘f’.
Decrement f
[ label ] DECF f,d
0
d
(f) – 1
Z
Decrement register ‘f’. If ‘d’ is ‘0’,
the result is stored in the W
register. If ‘d’ is ‘1’, the result is
stored back in register ‘f’.
Clear Watchdog Timer
[ label ] CLRWDT
None
00h
0
1
1
TO, PD
CLRWDT instruction resets the
Watchdog Timer. It also resets the
prescaler of the WDT. Status bits,
TO and PD, are set.
f
f
[0,1]
[0,1]
WDT prescaler,
TO
PD
2004 Microchip Technology Inc.
(destination)
127
127
WDT
(destination)
f,d
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