PIC16LF737-I/ML Microchip Technology, PIC16LF737-I/ML Datasheet - Page 34
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC16LF737-I/ML
Manufacturer Part Number
PIC16LF737-I/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Specifications of PIC16LF737-I/ML
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC16F7X7
3.3
A program memory location may be read by writing two
bytes of the address to the PMADR and PMADRH reg-
isters and then setting control bit, RD (PMCON1<0>).
Once the read control bit is set, the microcontroller will
use the next two instruction cycles to read the data. The
data is available in the PMDATA and PMDATH
registers after the second NOP instruction; therefore, it
can be read as two bytes in the following instructions.
The PMDATA and PMDATH registers will hold this
value until the next read operation.
EXAMPLE 3-1:
TABLE 3-1:
DS30498C-page 32
Address
10Dh
10Fh
10Ch
10Eh
18Ch
Legend: x = unknown, u = unchanged, — = unimplemented, read as ‘0’. Shaded cells are not used during Flash access.
Note 1:
Required
Sequence
Reading the Flash Program
Memory
PMADR
PMADRH
PMDATA EEPROM Data Register Low Byte
PMDATH
PMCON1 reserved
This bit always reads as a ‘1’.
Name
BSF
BCF
MOVF
MOVWF
MOVF
MOVWF
BSF
BSF
NOP
NOP
BCF
MOVF
MOVF
REGISTERS ASSOCIATED WITH PROGRAM FLASH
EEPROM Address Register Low Byte
FLASH PROGRAM READ
Bit 7
STATUS, RP1
STATUS, RP0
ADDRH, W
PMADRH
ADDRL, W
PMADR
STATUS, RP0
PMCON1, RD
STATUS, RP0
PMDATA, W
PMDATH, W
—
—
(1)
Bit 6 Bit 5
—
—
—
EEPROM Data Register High Byte
—
—
;
; Bank 2
;
; MSByte of Program Address to read
;
; LSByte of Program Address to read
; Bank 3 Required
; EEPROM Read Sequence
; memory is read in the next two cycles after BSF PMCON1,RD
;
; Bank 2
; W = LSByte of Program PMDATA
; W = MSByte of Program PMDATH
Bit 4
—
—
EEPROM Address Register High Byte ---- xxxx ---u uuuu
Bit 3
—
3.4
Flash program memory has its own code-protect
mechanism. External read and write operations by
programmers are disabled if this mechanism is
enabled.
The microcontroller can read and execute instructions
out of the internal Flash program memory, regardless
of the state of the code-protect configuration bits.
Bit 2
—
Operation During Code-Protect
Bit 1
—
Bit 0
RD
2004 Microchip Technology Inc.
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
--xx xxxx --uu uuuu
1--- ---0 1--- ---0
POR, BOR
Value on:
Value on
all other
Resets
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