PIC16F1526T-I/PT Microchip Technology, PIC16F1526T-I/PT Datasheet - Page 194

• Manufacturer Part Number: PIC16F1526T-I/PT
• Description: 64-pin, 14KB Flash, 768B RAM, 10-bit ADC, 10xCCP, 2xSPI, 2xMI2C, 2xEUSART, 2.3V-
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1526T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 5.5 V
• Data Converters: A/D 30x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16(L)F1526/27
20.3.5
The PWM duty cycle is specified by writing a 10-bit
value to multiple registers: CCPRxL register and
DCxB<1:0> bits of the CCPxCON register. The
CCPRxL contains the eight MSbs and the DCxB<1:0>
bits of the CCPxCON register contain the two LSbs.
CCPRxL and DCxB<1:0> bits of the CCPxCON
register can be written to at any time. The duty cycle
value is not latched into CCPRxH until after the period
completes (i.e., a match between PRx and TMRx
registers occurs). While using the PWM, the CCPRxH
register is read-only.
Equation 20-2
width.
Equation 20-3
ratio.
EQUATION 20-2:
EQUATION 20-3:
TABLE 20-7:
TABLE 20-8:
DS41458B-page 194
Timer Prescale (1, 4, 16)
PRx Value
Maximum Resolution (bits)
Timer Prescale (1, 4, 16)
PRx Value
Maximum Resolution (bits)
Duty Cycle Ratio
Pulse Width
PWM Frequency
PWM Frequency
PWM DUTY CYCLE
is used to calculate the PWM duty cycle
is used to calculate the PWM pulse
=
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS (F
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS (F

T
=
CCPRxL:CCPxCON<5:4>
OSC
PULSE WIDTH
DUTY CYCLE RATIO

---------------------------------------------------------------------- -
CCPRxL:CCPxCON<5:4>

(TMRx Prescale Value)
4 PRx

1.22 kHz
1.22 kHz
0xFF
0x65
16
10
16
+
8
1



4.88 kHz
4.90 kHz

0xFF
Preliminary
0x65
10
4
4
8
19.53 kHz
19.61 kHz
The CCPRxH register and a 2-bit internal latch are
used to double buffer the PWM duty cycle. This double
buffering is essential for glitchless PWM operation.
The 8-bit timer TMRx register is concatenated with either
the 2-bit internal system clock (F
prescaler, to create the 10-bit time base. The system
clock is used if the Timer2/4/6/8/10 prescaler is set to
1:1.
When the 10-bit time base matches the CCPRxH and
2-bit latch, then the CCPx pin is cleared (see
Figure
20.3.6
The resolution determines the number of available duty
cycles for a given period. For example, a 10-bit resolution
will result in 1024 discrete duty cycles, whereas an 8-bit
resolution will result in 256 discrete duty cycles.
The maximum PWM resolution is 10 bits when PRx is
255. The resolution is a function of the PRx register
value as shown by
EQUATION 20-4:
0xFF
Note:
0x65
10
1
1
8
20-4).
Resolution
PWM RESOLUTION
If the pulse width value is greater than the
period the assigned PWM pin(s) will
remain unchanged.
78.12 kHz
76.92 kHz
0x3F
0x19
1
8
1
6
Equation
OSC
OSC
=
PWM RESOLUTION
log
----------------------------------------- - bits
 2011 Microchip Technology Inc.
= 20 MHz)
= 8 MHz)

4 PRx
153.85 kHz
log
156.3 kHz
20-4.

0x0C
0x1F
2  
OSC
1
7
1
5
+
1
), or 2 bits of the


208.3 kHz
200.0 kHz
0x17
0x09
6.6
1
1
5