HBLXT9763HC.C4 Intel, HBLXT9763HC.C4 Datasheet - Page 40

• Manufacturer Part Number: HBLXT9763HC.C4
• Manufacturer: Intel

Specifications of HBLXT9763HC.C4

• Lead Free Status / RoHS Status: Not Compliant

LXT9763 — Fast Ethernet 10/100 Hex Transceiver with Full MII
2.1.5
2.1.6
2.1.6.1
2.1.7
40
Rx turns ratio
Tx turns ratio
Insertion loss
Primary inductance
Transformer isolation
Differential to common mode rejection
Table 13. Magnetics Requirements
Parameter
The RBIAS Pin
The LXT9763 requires a 22.1 k
ground. Place the RBIAS resistor as close to the RBIAS pin as possible. Run an etch directly from
the pin to the resistor, and sink the other side of the resistor to a filtered ground. Surround the
RBIAS trace with a filtered ground; do not run high-speed signals next to RBIAS.
The Twisted-Pair Interface
Follow standard guidelines for a twisted-pair interface:
Magnetics Information
The LXT9763 requires a 1:1 ratio for the receive transformers and a 1:1 ratio for the transmit
transformers. The transformer isolation voltage should be rated at 1.5 kV to protect the circuitry
from static voltages across the connectors and cables. Refer to
requirements. Before committing to a specific component, designers should contact the
manufacturer for current product specifications, and validate the magnetics for the specific
application.
The Fiber Interface
The fiber interface consists of a PECL transmit and receive pair to an external fiber-optic
transceiver. The LXT9763 does not provide Signal Detect pins and therefore does not receive or
transmit fault signals. The transmit and receive pair should be DC-coupled to the transceiver, and
biased appropriately. Refer to the fiber transceiver manufacturer’s recommendations for
termination circuitry.
•
•
•
•
•
•
Place the magnetics as close as possible to the LXT9763.
Keep transmit pair traces as short as possible; both traces should have the same length.
Avoid vias and layer changes as much as possible.
Keep the transmit and receive pairs apart to avoid cross-talk.
Route the transmit pair adjacent to a ground plane. The optimum arrangement is to place the
transmit traces two to three layers from the ground plane, with no intervening signals.
Improve EMI performance by filtering the TPO center tap. A single ferrite bead may be used
to supply center tap current to all ports. All six ports draw a combined total of 370 mA so the
bead should be rated at 560 mA.
Figure 19 on page 43
Min
350
0.0
40
–
–
–
1% resistor directly connected between the RBIAS pin and
Nom
1 : 1
1 : 1
0.6
1.5
–
–
shows a typical example.
Max
1.1
–
–
–
–
–
Units
dB
kV
dB
–
–
H
Table 13
.1 to 60 MHz
for transformer
Test Condition
Datasheet