HBLXT9763HC.C4 Intel, HBLXT9763HC.C4 Datasheet - Page 16
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HBLXT9763HC.C4
Manufacturer Part Number
HBLXT9763HC.C4
Description
Manufacturer
Intel
Datasheet
1.HBLXT9763HC.C4.pdf
(74 pages)
Specifications of HBLXT9763HC.C4
Lead Free Status / RoHS Status
Not Compliant
LXT9763 — Fast Ethernet 10/100 Hex Transceiver with Full MII
1.0
1.1
1.1.1
1.1.2
16
Functional Description
Introduction
The LXT9763 six-port Fast Ethernet 10/100 Transceiver supports 10 Mbps and 100 Mbps
networks. It complies with all applicable requirements of IEEE 802.3. Each port directly drives
either a 100BASE-TX line (up to 100 meters) or a 10BASE-T line (up to 185 meters). The
LXT9763 also supports 100BASE-FX operation via a Pseudo-ECL (PECL) interface.
OSP™ Architecture
Intel’s LXT9763 incorporates high-efficiency Optimal Signal Processing™ design techniques,
combining the best properties of digital and analog signal processing to produce a truly optimal
device.
The receiver utilizes decision feedback equalization to increase noise and cross-talk immunity by
as much as 3 dB over an ideal all-analog equalizer. Using OSP mixed-signal processing techniques
in the receive equalizer avoids the quantization noise and calculation truncation errors found in
traditional DSP-based receivers (typically complex DSP engines with A/D converters). This
results in improved receiver noise and cross-talk performance.
The OSP signal processing scheme also requires substantially less computational logic than
traditional DSP-based designs. This lowers power consumption and also reduces the logic
switching noise generated by high-speed DSP engines. This logic switching noise can be a
considerable source of EMI generated on the device’s power supplies.
The OSP-based LXT9763 provides improved data recovery, EMI performance, and power
consumption.
Comprehensive Functionality
The LXT9763 provides six standard Media Independent Interfaces (MIIs) for 10/100 MACs, each
serving an individual network port. The LXT9763 performs all functions of the Physical Coding
Sublayer (PCS) and Physical Media Attachment (PMA) sublayer as defined in the IEEE 802.3
100BASE-X specification. This device also performs all functions of the Physical Media
Dependent (PMD) sublayer for 100BASE-TX connections.
On power-up, the LXT9763 reads its configuration pins to check for forced operation settings. If
not configured for forced operation, each port uses auto-negotiation/parallel detection to
automatically determine line operating conditions. If the PHY device on the other side of the link
supports auto-negotiation, the LXT9763 auto-negotiates with it using Fast Link Pulse (FLP) bursts.
If the PHY partner does not support auto-negotiation, the LXT9763 automatically detects the
presence of either link pulses (10 Mbps PHY) or Idle symbols (100 Mbps PHY) and set its
operating conditions accordingly.
The LXT9763 provides half-duplex and full-duplex operation at 100 Mbps and 10 Mbps.
Datasheet