HBLXT9763HC.C4 Intel, HBLXT9763HC.C4 Datasheet - Page 32

• Manufacturer Part Number: HBLXT9763HC.C4
• Manufacturer: Intel

Specifications of HBLXT9763HC.C4

• Lead Free Status / RoHS Status: Not Compliant

LXT9763 — Fast Ethernet 10/100 Hex Transceiver with Full MII
1.10.2.2
1.10.2.3
32
PMA Sublayer
Link
In 100TX and FX modes, the LXT9763 establishes a link whenever the scrambler becomes locked
and remains locked for approximately 50 ms. Whenever the scrambler loses lock (<12 consecutive
idle symbols during a 2 ms window), the link will be taken down. This provides a very robust link,
essentially filtering out any small noise hits that may otherwise disrupt the link.
The LXT9763 reports link failure via the MII status bits (1.2, 17.10, and 19.4) and interrupt
functions. If auto-negotiate is enabled, link failure causes the LXT9763 to re-negotiate.
Link Failure Override
The LXT9763 normally transmits 100 Mbps data packets or Idle symbols only if the link is up, and
transmits only FLP bursts if the link is not up. Setting bit 16.14 = 1 overrides this function,
allowing the LXT9763 to transmit data packets even when the link is down. This feature is
provided as a diagnostic tool. Note that auto-negotiation must be disabled to transmit data packets
in the absence of link. If auto-negotiation is enabled, the LXT9763 automatically begins
transmitting FLP bursts if the link goes down.
Carrier Sense
For 100TX and 100FX links, a Start-of-Stream Delimiter (SSD) or /J/K symbol pair causes
assertion of carrier sense (CRS). An End-of-Stream Delimiter (ESD), or /T/R symbol pair causes
de-assertion of CRS. The PMA layer also de-asserts CRS if IDLE symbols are received without /
T/R; however, in this case RX_ER is asserted for one clock cycle when CRS is de-asserted.
Usage of CRS for Interframe Gap (IFG) timing is not recommended for the following reasons:
Receive Data Valid
The LXT9763 asserts RX_DV to indicate that the received data maps to valid symbols. However,
RXD outputs zeros until the received data is decoded and available for transfer to the controller.
Twisted-Pair PMD Sublayer
The twisted-pair Physical Medium Dependent (PMD) layer provides the signal scrambling and
descrambling, line coding and decoding (MLT-3 for 100TX, Manchester for 10T), as well as
receiving, polarity correction, and baseline wander correction functions.
Scrambler/Descrambler (100TX Only)
The scrambler spreads the signal power spectrum and further reduces EMI using an 11-bit, non-
data-dependent polynomial. The receiver automatically decodes the polynomial whenever it
receives IDLE symbols.
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De-assertion time for CRS is slightly longer than assertion time. This causes IFG intervals to
appear somewhat shorter to the MAC than it actually is on the wire.
CRS de-assertion is not aligned with TX_EN de-assertion on transmit loopbacks in half-
duplex mode.
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