HBLXT9763HC.C4 Intel, HBLXT9763HC.C4 Datasheet - Page 21

• Manufacturer Part Number: HBLXT9763HC.C4
• Manufacturer: Intel

Specifications of HBLXT9763HC.C4

• Lead Free Status / RoHS Status: Not Compliant

1.5
1.5.1
1.5.1.1
1.6
Datasheet
An additional supply may be used for the MII (VCCIO).
same power source used to supply the controller on the other side of the MII interface. Refer to
Table 17 on page 45
As a matter of good practice, these supplies should be as clean as possible. Typical filtering and
decoupling are shown in
Clock Requirements
Reference Clock
The LXT9763 requires a constant 25 MHz reference clock (REFCLK). The reference clock is used
to generate transmit signals and recover receive signals. A crystal-based clock is recommended
over a derived clock (i.e, PLL-based) to minmize transmit jitter. Refer to
clock timing requirements .
MII Clocks
The LXT9763 requires an MDC reference clock for the MDIO serial channel. Typically operated at
2.5 MHz, the LXT9763 accepts MDC clocks as high as 8 MHz. Refer to Test Specifications,
Table 18 on page 45, for MDC clock requirements.
The LXT9763 supplies both MII data clocks (RX_CLK and TX_CLK) for each port. The MII
data clocks run at 25 MHz for 100BASE-X operation and at 2.5 MHz for 10BASE-T operation.
Initialization
When the LXT9763 is first powered on, reset, or encounters a link failure state, it checks the MDIO
register configuration bits to determine the line speed and operating conditions to use for the
network link. The configuration bits may be set by the Hardware Control or MDIO interface as
shown in
The LXT9763 can be initialized to allow auto-negotiation/ parallel-detection to establish a link, or
it may be forced to any of the following configurations:
When the network link is forced to a specific configuration, the LXT9763 immediately begins
operating the network interface as commanded. When auto-negotiation is enabled, the LXT9763
begins the auto-negotiation / parallel-detection operation.
•
•
•
•
•
100FX (Fiber).
100TX, Full-Duplex
100TX, Half-Duplex
10BASE-T, Full-Duplex
10BASE-T, Half-Duplex
Figure
8.
for MII I/O characteristics.
17 on page
Fast Ethernet 10/100 Hex Transceiver with Full MII — LXT9763
41.
VCCIO should be supplied from the
Table 18 on page 45
for
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