FLLXT1000BA.C4QE000 Intel, FLLXT1000BA.C4QE000 Datasheet - Page 66

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FLLXT1000BA.C4QE000

Manufacturer Part Number
FLLXT1000BA.C4QE000
Description
Manufacturer
Intel
Datasheet

Specifications of FLLXT1000BA.C4QE000

Lead Free Status / RoHS Status
Not Compliant
LXT1000 — Gigabit Ethernet Transceiver
3.0
3.1
3.1.1
3.1.2
3.1.3
66
Application Information
Design Recommendations
Device Placement
The LXT1000 should be placed as close to the magnetics and RJ-45 connector as is possible, and
no more than 6 to 9 inches away from the MAC or ASIC it is interfacing to.
The RBIAS resistor, GBIAS capacitor and MAC Interface series resistors should be placed as close
to the LXT1000 as possible. Avoid high-speed signals in the vicinity of the RBIAS resistor. Pull-up
and pull-down resistors and LEDs are less critical, and can be placed farther away.
Ground Plane Layout
The LXT1000 uses a single common logic ground plane for all digital and analog functions. Put as
many ground-plane layers as is possible in the design. If possible, sandwich high-speed signals
between two ground planes for better impedance control and for better EMI performance. Design
the ground plane system to be as large and as quiet as possible, especially near the twisted-pair
signals.
Be cognizant of the split between chassis ground (used for terminating external cables) and logic/
circuit ground. Keep the two planes completely separate (single-point ground) or thoroughly tie
them together (multi-point ground). If the former, follow these rules:
In either case, the following always apply:
Power Plane Layout and Filtering
A split analog/digital power plane is recommended for the LXT1000. For designs using multiple
LXT1000s, one common digital VCC plane and one common analog VCC plane can be used for all
devices.
The digital and analog VCC planes should be connected by one or more ferrite beads. The
cumulative current rating of all beads should be the number of LXT1000 devices times 1.0A. Bulk
capacitors (2.2, 4.7, or 10 F) must be placed on each side of each ferrite.
Run the split between the chassis ground and circuit ground directly under the magnetics.
Reference the cables, chassis and line-side of the magnetics to chassis ground. Reference all
devices, decoupling and bypass capacitors on the device side of the magnetics to circuit
ground.
Do not run any signals in the chassis ground region unless absolutely necessary (LEDs, for
example).
Never run a high-speed signal across a break in a ground plane. Maintain continuous ground
plane presence near all high-speed signals.
Never loop ground planes.
Document #: 249276
Rev. Date: 07/20/01
Revision #: 002
Datasheet

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