FLLXT1000BA.C4QE000 Intel, FLLXT1000BA.C4QE000 Datasheet - Page 50

• Manufacturer Part Number: FLLXT1000BA.C4QE000
• Manufacturer: Intel

Specifications of FLLXT1000BA.C4QE000

• Lead Free Status / RoHS Status: Not Compliant

LXT1000 — Gigabit Ethernet Transceiver
2.5.3
2.5.3.1
2.5.3.2
2.5.3.3
2.5.3.4
2.5.3.5
50
Figure 20. 1000BASE-T Receive Flow
GMII
Receive Functions
This section describes functions which are used when the LXT1000 receives data from the twisted-
pair interface and passes it back to the MAC (see
Hybrid
The hybrid subtracts the transmitted signal from the input signal, allowing the use of simple
100BASE-TX compatible magnetics.
Automatic Gain Control
The Automatic Gain Control (AGC) normalizes the amplitude of the received signal, adjusting for
the attenuation produced by the cable.
Timing Recovery
This function re-generates a receive clock from the incoming data stream which is used to sample
the data. On the Slave side of the link, this clock is also used to drive the transmitter.
Analog-to-Digital Converter
The Analog-to-Digital (ADC) function converts the incoming data stream from an analog
waveform to digitized samples for processing by the DSP core.
Digital Signal Processor
The Digital Signal Processor (DSP) provides per-channel adaptive filtering, which eliminates
various signal impairments including:
D0
D1
D2
D3
D4
D5
D6
D7
•
•
•
Inter-symbol interference (equalization).
Echo caused by impedance mismatch of the cable.
Near-end crosstalk (NEXT) between adjacent channels (A, B, C, D).
8 bits
Descrambler
Polynomial
8 bits
Receiver
DSP
Figure 18
and
Figure
from 4-Pair UTP Line
Encoded Input
20).
PAM-5
Document #: 249276
Rev. Date: 07/20/01
Revision #: 002
Datasheet