AM79C976KI AMD (ADVANCED MICRO DEVICES), AM79C976KI Datasheet - Page 197

• Manufacturer Part Number: AM79C976KI
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C976KI

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 208
• Lead Free Status / RoHS Status: Not Compliant

3
2
1
0
CSR117-121: Reserved
Bit
31-0
CSR122: Reserved
Bit
31-0
9/14/00
RWU_DRIVER RWU Driver Type. If this bit is set
RWU_GATE RWU Gate Control. If this bit is
RWU_POL RWU Pin Polarity. If RWU_POL
RST_POL
Name
RES
Name
RES
by S_RESET or setting the STOP
bit.
to 1, RWU is a totem pole driver;
otherwise RWU is an open drain
output.
by H_RESET and is not affected
by S_RESET or setting the STOP
bit.
set, RWU is forced to the high Im-
pedance State when PG is LOW,
regardless of the state of the
MPMAT and LCDET bits.
by H_RESET and is not affected
by S_RESET or setting the STOP
bit.
is set to 1, the RWU pin is normal-
ly HIGH and asserts LOW; other-
wise, RWU is normally LOW and
asserts HIGH.
by H_RESET and is not affected
by S_RESET or setting the STOP
bit.
RST_POL is set to 1, the
PHY_RST pin is active LOW; oth-
erwise,
HIGH.
by H_RESET and is not affected
by S_RESET or setting the STOP
bit.
zeros and read as undefined.
zeros and read as undefined.
Read/Write accessible. Cleared
Read/Write accessible. Cleared
Read/Write accessible. Cleared
PHY_RST Pin Polarity. If the
Read/Write accessible. Cleared
Reserved locations. Written as
Reserved locations. Written as
Description
Description
PHY_RST
P R E L I M I N A R Y
is
active
Am79C976
CSR123: Reserved
Bit
31-0
CSR124: Test Register 1
This register is used to place the Am79C976 controller
into various test modes. The Runt Packet Accept is the
only user accessible test mode. All other test modes are
for AMD internal use only.
Bit
31-16 RES
15-4
3
2-0
CSR125: MAC Enhanced Configuration Control
Bit
31-16 RES
15-8
Name
RES
Name
RES
RPA
RES
Name
IPG
The minimum packet size that
can be received is 12 bytes.
Read/Write accessible. RPA is
cleared
S_RESET and is not affected by
STOP.
IPG should be programmed to
the nearest nibble. The two least
significant bits are ignored. For
Reserved locations. Written as
zeros and read as undefined.
Reserved locations. Written as
zeros and read as undefined.
Reserved locations. Written as
zeros and read as undefined.
Runt Packet Accept. This bit forc-
es the Am79C976 controller to
accept runt packets (packets
shorter than 64 bytes).
Reserved locations. Written as
zeros and read as undefined.
Reserved locations. Written as
zeros and read as undefined.
Inter Packet Gap. This value indi-
cates the minimum number of
network bit times after the end of
a frame that the transmitter will
wait before it starts transmitting
another frame.
mode the end of the frame is de-
termined by CRS, while in full-du-
plex mode the end of the frame is
determined by TX_EN. The IPG
value can be adjusted to com-
pensate for delays through the
external PHY device.
Description
Description
Description
by
H_RESET
In half-duplex
197
or