KS8993F A5 Micrel Inc, KS8993F A5 Datasheet - Page 72

• Manufacturer Part Number: KS8993F A5
• Manufacturer: Micrel Inc

Specifications of KS8993F A5

• Number Of Primary Switch Ports: 3
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII/SNI
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 1.89/3.465V
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Not Compliant

KS8993F
Register 80 (0x50): My Status 1 (Terminal and Center side)
Register 81 (0x51): My Status 2
August 26, 2004
Bit
7
6
5
4
3
2
1
0
Bit
7-4
3
2
1
Name
S7
S6
S5
S4
S3
S2
S1
S0
Name
S15 – S12
S11
S10
S9
R/W
RO
RO
RO
R/W
R/W
R/W
RO
RO
R/W
RO
R/W
R/W
RO
Description
H-MC Link Option
1 = Terminal MC mode
0 = Center MC mode
1 = In loop back state (CST1, CST2, UST1)
0 = Normal
Loss of optical signal notification
1 = use FEFI
0 = use maintenance frame
(Center side - CPU will update this bit
DIAG result
1 = Diagnostic Fail
0 = Normal operation
(Center side - CPU will update this bit.
1 = link down
0 = link up
(Center side - CPU will update this bit.
SD disable
1 = abnormal (no optical signal detected)
0 = normal (optical signal detected)
1 = power down
0 = normal operation
Description
Number of Physical interface making up the UTP link
0 = one
1 = greater than one
For Terminal MC mode, this bit indicates the auto negotiation
capability.
For Center MC mode, this bit must always be “0”.
1 = auto negotiation is supported
0 = auto negotiation is not supported
For Terminal MC mode, this bit indicates the UTP port’s DUPLEX
status.
H-MC Link speed 1
Loop back mode indication
UTP Link Down
Power down
Reserved
Terminal side - Hardware will update this bit based on
Terminal side - This bit will be updated through DIAGF pin.)
Terminal side - This bit is read only and updated by hardware.)
external pin value)
- 72 -
Default
0
1 (Terminal side)
0 (Center side)
0
0
DIAGF pin value
DIAGF (Ipd)
1
1
Inverse of PDD#
pin value
PDD# (Ipu)
Default
0
0
P2ANEN pin
value
(Terminal MC)
-----------------------
0
(Center MC)
0
Revision 1.0
Micrel