KS8993F A5 Micrel Inc, KS8993F A5 Datasheet - Page 59

• Manufacturer Part Number: KS8993F A5
• Manufacturer: Micrel Inc

Specifications of KS8993F A5

• Number Of Primary Switch Ports: 3
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII/SNI
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 1.89/3.465V
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Not Compliant

KS8993F
Register 19 (0x13): Port 1 Control 3
Register 20 (0x14): Port 1 Control 4
Note: Registers 19 and 20 (and those corresponding to other ports) serve two purposes:
Register 21 (0x15): Port 1 Control 5
August 26, 2004
5
4
3
2
1
0
Bit
7-0
Bit
7-0
Register 35 (0x23): Port 2 Control 3
Register 51 (0x33): Port 3 Control 3
Register 36 (0x24): Port 2 Control 4
Register 52 (0x34): Port 3 Control 4
(1) Associated with the ingress untagged packets, and used for egress tagging.
(2) Default VID for the ingress untagged or null-VID-tagged packets, and used for
address look up.
Register 37 (0x25): Port 2 Control 5
Register 53 (0x35): Port 3 Control 5
Discard Non
PVID packets
Force flow
control
Back
pressure
enable
Transmit
enable
Receive
enable
Learning
disable
Name
Default tag
[15:8]
Name
Default tag
[7:0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
= 0, no ingress VLAN filtering
= 1, the switch will discard packets whose VID does not match
= 0, no packets will be discarded
= 1, will always enable flow control on the port, regardless of AN
= 0, the flow control is enabled based on AN result.
= 1, enable port’s half duplex back pressure
= 0, disable port’s half duplex back pressure.
= 1, enable packet transmission on the port
= 0, disable packet transmission on the port
= 1, enable packet reception on the port
= 0, disable packet reception on the port
= 1, disable switch address learning capability
= 0, enable switch address learning capability
Description
Port’s default tag, containing
Description
Port’s default tag, containing
ingress port default VID.
result.
7-5 : User Priority bits
3-0 : VID[11:8]
7-0 : VID[7:0]
4 : CFI bit
- 59 -
0
Pin value
during reset:
For port 1,
For port 2,
For port 3, this
bit has no
meaning. Flow
control is
controlled by
Pin value
during reset:
1
1
0
Default
0x00
Default
0x01
P1FFC pin
P2FFC pin
Reg. 6, bit 5
BPEN pin
Revision 1.0
Micrel