OCX256LTB792 Fairchild Semiconductor, OCX256LTB792 Datasheet - Page 9

• Manufacturer Part Number: OCX256LTB792
• Manufacturer: Fairchild Semiconductor

Specifications of OCX256LTB792

• Number Of Arrays: 1
• Differential Data Transmission: Yes
• Power Supply Requirement: Single
• Mounting: Surface Mount
• Line Code: NRZ
• On-chip Buffers: Yes
• On-chip Decoder: No
• On-chip Latch Circuit: No
• On-chip Mux/demux: No
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Lead Free Status / RoHS Status: Compliant

Introduction
1 0 1 0 X
1 0 1 1 X
1 1 0 0 X
1 1 0 1 X
1 1 1 0 X
1 1 1 1 X
I [3:0]
BB
BA
X
X
X
X
X
X
BA, B9, B8, B7
(Continued)
B9
B8, B7
X
X
X
X
X
X
0,0
0,1
1,0
1,1
BA
B9
B8 B7
X
X
X
X
X
X
TABLE 10. Programming an Output using JTAG
X
X
X
X
X
X
TABLE 9. JTAG Instructions (Continued)
Clock Select:
0
1
Output Mode:
0 = Flow-through (OP)
1 = Registered (RO)
Output Enable:
Output Enabled (ON) – this is the default state at reset
Output Disabled (OFF)
Output Controlled by OE (Active HIGH)
Output Controlled by OE (Active LOW)
Address
Address
A6 - A0
Output
Input
Global Clock
Next Neighbor
X
X
X
X
Connect—
No
ImpliedDisconnect
Set the
JTAG Address
Register
Device ID Out
Reset Output
Buffer
and
Crosspoint Array
Set RCE Bit
Bypass
9
Instruction
Signal/Function
Connects the Crosspoint cell at the Input
address specified in the JTAG Address
Register and the Output address speci-
fied in the Connect JTAG instruction (A6-
A0).
All connections to the same output
address are set to “No Connect” while all
other connections from the same input
remain the same as before.
Sets the 7-bit JTAG Address Register
with the 7-bit address (A6-A0) of the
JTAG Instruction Register. The 7-bit
address of the JTAG Address Register
becomes the Input port address for Cros-
spoint Access.
Serialize the device ID and revision his-
tory out to TDO. ID for the OCX256 is
0x0000C89F
Resets the Crosspoint Array to no-con-
nects. Sets the Output buffer to Flow-
through mode with Output Enabled. The
device ID is serialized to TDO.
Sets the RCE bit of the Mode Control
Register with the JTAG instruction bit A0.
To turn ON the RCE bit, encode bit A0 to
1.
To turn OFF the RCE bit, encode bit A0 to
0.
Places device in a mode to pass TDI data
to TDO with one clock delay. Used for
programming and testing devices
through serial connected JTAG controls.
Description
www.fairchildsemi.com
Preliminary