PN5120A0HN1/C1 NXP Semiconductors, PN5120A0HN1/C1 Datasheet - Page 51

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PN5120A0HN1/C1

Manufacturer Part Number
PN5120A0HN1/C1
Description
RF Wireless Misc COMBO ANALOG/DIGI IC
Manufacturer
NXP Semiconductors
Type
Transmission Moduler
Datasheet

Specifications of PN5120A0HN1/C1

Package / Case
HVQFN EP
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 30 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PN5120A0HN1/C1,157

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Product data sheet
8.2.4.4 TestPinEnReg
8.2.4.5 TestPinValueReg
Enables the pin output driver on the 8-bit parallel bus.
Table 107. TestPinEnReg register (address 33h); reset value: 80h, 10000000b
Table 108. Description of TestPinEnReg bits
Defines the values for the 7-bit parallel port when it is used as I/O.
Table 109. TestPinValueReg register (address 34h); reset value: 00h, 00000000b
Table 110. Description of TestPinValueReg bits
Bit
7
6 to 0
Bit
7
6 to 0
Access
Access
Rights
Rights
RS232LineEn
Symbol
RS232LineEn
TestPinEn
Symbol
UseIO
TestPinValue
UseIO
r/w
7
r/w
7
Rev. 3.4 — 8 September 2009
r/w
6
Description
Set to logic 0, the lines MX and DTRQ for the serial UART are
disabled.
Enables the pin output driver on the 8-bit parallel interface.
Example:
Note: Only valid if one of serial interfaces is used.
If the SPI interface is used only D0 to D4 can be used. If the serial
UART interface is used and RS232LineEn is set to logic 1 only D0 to
D4 can be used.
Description
Set to logic 1, this bit enables the I/O functionality for the 7-bit parallel
port in case one of the serial interfaces is used. The input /output
behavior is defined by TestPinEn in register TestPinEnReg. The value
for the output behavior is defined in the bits TestPinVal.
Note: If SAMClkD1 is set to logic 1, D1 can not be used as I/O.
Defines the value of the 7-bit parallel port, when it is used as I/O. Each
output has to be enabled by the TestPinEn bits in register
TestPinEnReg.
Note: Reading the register indicates the actual status of the pins D6 -
D0 if UseIO is set to logic 1. If UseIO is set to logic 0, the value of the
register TestPinValueReg is read back.
r/w
Setting bit 0 to 1 enables D0
Setting bit 5 to 1 enables D5
6
r/w
5
r/w
5
r/w
4
r/w
4
TestPinValue
TestPinEn
r/w
3
r/w
3
r/w
2
r/w
2
Transmission Module
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