PN5120A0HN1/C1 NXP Semiconductors, PN5120A0HN1/C1 Datasheet - Page 36
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PN5120A0HN1/C1
Manufacturer Part Number
PN5120A0HN1/C1
Description
RF Wireless Misc COMBO ANALOG/DIGI IC
Manufacturer
NXP Semiconductors
Type
Transmission Moduler
Datasheet
1.PN5120A0HN1C1.pdf
(131 pages)
Specifications of PN5120A0HN1/C1
Package / Case
HVQFN EP
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 30 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PN5120A0HN1/C1,157
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NXP Semiconductors
111334
Product data sheet
8.2.2.12 FelNFC2Reg
Defines the maximum length of the received packet.
Table 59.
Table 60.
Bit
7
6
5 to 0
Access
Rights
WaitForSelected
Symbol
WaitForSelected
ShortTimeSlot
DataLenMax
FelNFC2Reg register (address1Bh); reset value: 00h, 00000000b
Description of FelNFC2Reg bits
r/w
7
Rev. 3.4 — 8 September 2009
ShortTimeSlot
Description
Set to logic 1, the AutoColl command is only terminated
automatically when:
Note: If this bit is set, no active communication is possible.
Note: Setting this bit reduces the host controller interaction in case
of a communication to another device in the same RF field during
Passive Communication mode.
Defines the time slot length for Passive Communication mode at
424 kbit. Set to logic 1 a short time slot is used (half of the timeslot
at 212 kbit). Set to logic 0 a long timeslot is used (equal to the
timeslot for 212 kbit).
These bits define the maximum length of the accepted packet
length: DataLenMax*4 ≥ data packet length
Note: If set to logic 0 the maximum data length is 256 bytes.
This parameter is ignored at 106 kbit if the bit DetectSync in
register ModeReg is set to logic 0. If a received packet is larger
than the defined DataLenMax value, the packet will be ignored.
1. A valid command has been received after performing a valid
2. A valid command has been received after performing a valid
r/w
Select procedure according ISO/IEC 14443A.
Polling procedure according to the FeliCa specification.
6
r/w
5
r/w
4
DataLenMax
r/w
3
Transmission Module
r/w
2
© NXP B.V. 2010. All rights reserved.
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