TDA9885TS/V3 NXP Semiconductors, TDA9885TS/V3 Datasheet - Page 8

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TDA9885TS/V3

Manufacturer Part Number
TDA9885TS/V3
Description
Modulator / Demodulator ALIGN FRRE VIF/SIF CIR NEG MOD
Manufacturer
NXP Semiconductors
Datasheet

Specifications of TDA9885TS/V3

Package / Case
SSOP-24
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
- 20 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
TDA9885TS/V3,112

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NXP Semiconductors
8. Functional description
TDA9885_TDA9886_3
Product data sheet
8.1 VIF amplifier
8.2 Tuner AGC and VIF AGC
Figure 1
functional blocks:
The VIF amplifier consists of three AC-coupled differential stages. Gain control is
performed by emitter degeneration and collector resistor variation. The total gain control
range is typically 66 dB. The differential input impedance is typically 2 k in parallel with
3 pF.
This block adapts the voltage, generated at the VIF-AGC detector, to the internal signal
processing at the VIF amplifier and performs the tuner AGC control current generation.
The onset of the tuner AGC control current generation can be set either via the I
(see
information cannot be stored, related to the device). The presence of a potentiometer is
automatically detected and the I
Furthermore, derived from the AGC detector voltage, a comparator is used to detect if the
corresponding VIF input voltage is higher than 200 V. This information can be read out
via the I
VIF amplifier
Tuner AGC and VIF AGC
VIF-AGC detector
Frequency Phase-Locked Loop (FPLL) detector
VCO and divider
AFC and digital acquisition help
Video demodulator and amplifier
Sound carrier trap
SIF amplifier
SIF-AGC detector
Single reference QSS mixer
AM demodulator
FM demodulator and acquisition help
Audio amplifier and mute time constant
Internal voltage stabilizer
I
2
Table
C-bus transceiver and MAD
2
C-bus (bit VIFLEV = 1).
shows the simplified block diagram of the device which comprises the following
12) or optionally by a potentiometer at pin TOP (in case that the I
I
2
C-bus controlled multistandard alignment-free IF-PLL demodulators
Rev. 03 — 16 December 2008
2
C-bus setting is disabled.
TDA9885; TDA9886
© NXP B.V. 2008. All rights reserved.
2
C-bus
2
C-bus
8 of 56

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