TDA9885TS/V3 NXP Semiconductors, TDA9885TS/V3 Datasheet - Page 25

• Manufacturer Part Number: TDA9885TS/V3
• Description: Modulator / Demodulator ALIGN FRRE VIF/SIF CIR NEG MOD
• Manufacturer: NXP Semiconductors

Specifications of TDA9885TS/V3

• Package / Case: SSOP-24
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: - 20 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: TDA9885TS/V3,112

NXP Semiconductors
Table 20.
V
f
for L); IF input from 50
L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”; measurements taken in
test circuit of
TDA9885_TDA9886_3
Product data sheet
Symbol
I standard; see
B
t
D/K standard; see
B
t
Video output 1.1 V; pin CVBS
Trap bypass mode and sound carrier off
V
V
V
V
B
B
S/N
S/N
SC
d(g)(cc)
d(g)(cc)
P
SC1
SC1(60kHz)
SC2
SC2(60kHz)
SC1
SC1(60kHz)
SC2
SC2(60kHz)
v( 3dB)(trap)
v( 3dB)(trap)
o(v)(p-p)
sync
clip(u)
clip(l)
v( 1dB)
v( 3dB)
= 5 V; T
= 33.4 MHz; PC / SC = 13 dB; f
W
UW
amb
Characteristics
Figure
= 25 C; see
Figure 19
Parameter
sound carrier trap
attenuation at first sound carrier
attenuation at first sound carrier
f
attenuation at second sound
carrier
attenuation at second sound
carrier f
group delay at color carrier
frequency
sound carrier trap
attenuation at first sound carrier
attenuation at first sound carrier
f
attenuation at second sound
carrier
attenuation at second sound
carrier f
group delay at color carrier
frequency
video output voltage
(peak-to-peak value)
sync voltage level
upper video clipping voltage level
lower video clipping voltage level
weighted signal-to-noise ratio
unweighted signal-to-noise ratio
SC1
SC1
3 dB video bandwidth including
3 dB video bandwidth including
1 dB video bandwidth
3 dB video bandwidth
Figure 20
26; unless otherwise specified.
60 kHz
60 kHz
via broadband transformer 1 : 1; video modulation DSB; residual carrier for B/G is 10 % and for
SC2
SC2
Table 22
…continued
60 kHz
60 kHz
mod
for input frequencies; B/G standard is used for the specification (f
= 400 Hz); input level V
[12]
I
2
C-bus controlled multistandard alignment-free IF-PLL demodulators
Rev. 03 — 16 December 2008
Conditions
f
f = 6.0 MHz
f = 6.0 MHz
f = 6.55 MHz
f = 6.55 MHz
f = 4.43 MHz
f
f = 6.5 MHz
f = 6.5 MHz
f = 6.742 MHz
f = 6.742 MHz
f = 4.28 MHz
see
AC load: C
R
AC load: C
R
unified weighting filter
( “ITU-T J.61” );
see
trap
trap
L
L
> 1 k
> 1 k
= 6.0 MHz
= 6.5 MHz
Figure 7
Figure 13
i(VIF)
L
L
< 20 pF,
< 20 pF,
= 10 mV (RMS) (sync level for B/G; peak white level
TDA9885; TDA9886
[11]
[11]
[7]
[7]
Min
5.40
26
20
12
10
-
5.50
26
20
18
13
-
0.95
1.35
3.5
-
5
7
56
48
Typ
5.50
32
26
18
15
90
5.95
32
26
24
18
60
1.10
1.5
3.6
0.9
6
8
59
52
PC
© NXP B.V. 2008. All rights reserved.
= 38.9 MHz;
Max
-
-
-
-
-
160
-
-
-
-
-
130
1.25
1.6
-
1.0
-
-
-
-
Unit
MHz
dB
dB
dB
dB
ns
MHz
dB
dB
dB
dB
ns
V
V
V
V
MHz
MHz
dB
dB
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