TDA9885TS/V3 NXP Semiconductors, TDA9885TS/V3 Datasheet - Page 12

• Manufacturer Part Number: TDA9885TS/V3
• Description: Modulator / Demodulator ALIGN FRRE VIF/SIF CIR NEG MOD
• Manufacturer: NXP Semiconductors

Specifications of TDA9885TS/V3

• Package / Case: SSOP-24
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: - 20 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: TDA9885TS/V3,112

NXP Semiconductors
TDA9885_TDA9886_3
Product data sheet
8.12 AM demodulator
8.13 FM demodulator and acquisition help
8.14 Audio amplifier and mute time constant
The QSS mixer output signal is fed internally via a high-pass and low-pass combination to
the FM demodulator as well as via an operational amplifier to the intercarrier output
pin SIOMAD.
The amplitude modulated SIF amplifier output signal is fed both to a two-stage limiting
amplifier that removes the AM and to a linear multiplier. The result of the multiplication of
the SIF signal with the limiter output signal is AM demodulation (passive synchronous
demodulator). The demodulator output signal is fed via a low-pass filter that attenuates
the carrier harmonics and through the input amplifier of the SIF-AGC detector to the audio
amplifier.
The narrowband FM-PLL detector consists of:
The 2nd SIF signal from the intercarrier mixer is fed to the input of an AC-coupled gain
controlled amplifier with two stages. The gain controlled output signal is fed to the phase
detector of the narrowband FM PLL (FM demodulator). For good selectivity and
robustness against disturbance caused by the video signal, a high linearity of the gain
controlled FM amplifier and of the phase detector as well as a constant signal level are
required. The gain control is done by means of an ‘in phase’ demodulator for the 2nd SIF
signal (from the output of the FM amplifier). The demodulation output is fed into a
comparator for charging or discharging the integrated AGC capacitor. This leads to a
mean value AGC loop to control the gain of the FM amplifier.
The FM demodulator is realized as a narrowband PLL with an external loop filter, which
provides the necessary selectivity (bandwidth approximately 100 kHz). To achieve good
selectivity, a linear phase detector and a constant input level are required. The gain
controlled intercarrier signal from the FM amplifier is fed to the phase detector. The phase
detector controls via the loop filter the integrated low radiation relaxation oscillator. The
designed frequency range is from 4 MHz to 7 MHz.
The VCO within the FM PLL is phase-locked to the incoming 2nd SIF signal, which is
frequency modulated. As well as this, the VCO control voltage is superimposed by the
AF voltage. Therefore, the VCO tracks with the FM of the 2nd SIF signal. So, the
AF voltage is present at the loop filter and is typically 5 mV (RMS) for 27 kHz
FM deviation. This AF signal is fed via a buffer to the audio amplifier.
The correct locking of the PLL is supported by the digital acquisition help circuit
(see
The audio amplifier consists of two parts:
•
•
•
•
Gain controlled FM amplifier and AGC detector
Narrowband PLL
AF preamplifier
AF output amplifier
Section
8.6).
I
2
C-bus controlled multistandard alignment-free IF-PLL demodulators
Rev. 03 — 16 December 2008
TDA9885; TDA9886
© NXP B.V. 2008. All rights reserved.
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