MT48H16M16LFBF-75:H TR Micron Technology Inc, MT48H16M16LFBF-75:H TR Datasheet - Page 81

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MT48H16M16LFBF-75:H TR

Manufacturer Part Number
MT48H16M16LFBF-75:H TR
Description
DRAM Chip Mobile SDRAM 256M-Bit 16Mx16 1.8V 54-Pin VFBGA T/R
Manufacturer
Micron Technology Inc
Type
Mobile SDRAMr
Datasheet

Specifications of MT48H16M16LFBF-75:H TR

Package
54VFBGA
Density
256 Mb
Address Bus Width
15 Bit
Operating Supply Voltage
1.8 V
Maximum Clock Rate
133 MHz
Maximum Random Access Time
8|6 ns
Operating Temperature
0 to 70 °C
Deep Power-Down
PDF: 09005aef834c13d2
256mb_mobile_sdram_y36n.pdf - Rev. I 11/09 EN
Deep power-down mode is a maximum power-saving feature achieved by shutting off
the power to the entire device memory array. Data on the memory array will not be re-
tained after deep power-down mode is executed. Deep power-down mode is entered by
having all banks idle, with CS# and WE# held LOW with RAS# and CAS# HIGH at the
rising edge of the clock, while CKE is LOW. CKE must be held LOW during deep power-
down.
To exit deep power-down mode, CKE must be asserted HIGH. Upon exiting deep power-
down mode, a full initialization sequence is required.
256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM
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Micron Technology, Inc. reserves the right to change products or specifications without notice.
©2008 Micron Technology, Inc. All rights reserved.
Deep Power-Down

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