LAN9311I-NZW Standard Microsystem (Smsc), LAN9311I-NZW Datasheet - Page 285
LAN9311I-NZW
Manufacturer Part Number
LAN9311I-NZW
Description
Manufacturer
Standard Microsystem (Smsc)
Datasheet
1.LAN9311-NU.pdf
(460 pages)
Specifications of LAN9311I-NZW
Package
128XVTQFP
Phy/transceiver Interface
MII
Number Of Primary Switch Ports
2
Maximum Data Rate
100 Mbps
Internal Memory Buffer Size
32 KB
Vlan Support
Yes
Power Supply Type
Analog
Minimum Single Supply Voltage
3 V
Maximum Single Supply Voltage
3.6 V
Maximum Supply Current
0.295 A
Maximum Power Dissipation
1070 mW
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Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
14.3.11
BITS
31:0
Wake-Up Frame Filter (WFF)
The Wake-up frame filter is configured through this register using an
indexing mechanism. After power-on reset, digital reset, or soft reset, the
Host MAC loads the first value written to this location to the first DWORD in
the Wake-up frame filter (filter 0 byte mask). The second value written to this
location is loaded to the second DWORD in the wake-up frame filter (filter 1
byte mask) and so on. Once all eight DWORD’s have been written, the
internal pointer will once again point to the first entry and the filter entries
can be modified in the same manner.
Note:
Host MAC Wake-up Frame Filter Register (HMAC_WUFF)
This write-only register is used to configure the wake-up frame filter. Refer to
Frame Detection," on page 117
This is a write-only register.
Offset:
Bh
DESCRIPTION
for additional information.
DATASHEET
285
Size:
32 bits
TYPE
WO
Section 9.5, "Wake-up
Revision 1.7 (06-29-10)
DEFAULT
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