LAN9311I-NZW Standard Microsystem (Smsc), LAN9311I-NZW Datasheet - Page 240

• Manufacturer Part Number: LAN9311I-NZW
• Manufacturer: Standard Microsystem (Smsc)

Specifications of LAN9311I-NZW

• Package: 128XVTQFP
• Phy/transceiver Interface: MII
• Number Of Primary Switch Ports: 2
• Maximum Data Rate: 100 Mbps
• Internal Memory Buffer Size: 32 KB
• Vlan Support: Yes
• Power Supply Type: Analog
• Minimum Single Supply Voltage: 3 V
• Maximum Single Supply Voltage: 3.6 V
• Maximum Supply Current: 0.295 A
• Maximum Power Dissipation: 1070 mW

Revision 1.7 (06-29-10)
14.2.6.7
BITS
31:0
Physical Address[31:0]
This field contains the lower 32-bits (31:0) of the physical address of the
Switch Fabric MACs.
Switch Fabric MAC Address Low Register (SWITCH_MAC_ADDRL)
This register contains the lower 32-bits of the MAC address used by the switch for Pause frames. This
r e g i s t e r i s u s e d i n c o n j u n c t i o n w i t h
(SWITCH_MAC_ADDRH). The contents of this register are optionally loaded from the EEPROM at
power-on through the EEPROM Loader if a programmed EEPROM is detected. The least significant
byte of this register (bits [7:0]) is loaded from address 01h of the EEPROM. The most significant byte
(bits [31:24]) is loaded from address 04h of the EEPROM. These EEPROM values are also loaded
into the
field after the initialization process has completed.
Refer to
this register. Refer to
EEPROM Loader.
Host MAC Address Low Register
Offset:
Section 9.6, "Host MAC Address," on page 120
Section 10.2.4, "EEPROM Loader," on page 150
1F4h
DESCRIPTION
DATASHEET
240
(HMAC_ADDRL). The Host can update the contents of this
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
S w i t c h F a b r i c M A C A d d r e s s H i g h R e g i s t e r
Size:
for details on how the EEPROM Loader loads
32 bits
for information on using the
TYPE
R/W
SMSC LAN9311/LAN9311i
FF0F8000h
DEFAULT
Datasheet