AD5748ACPZ Analog Devices Inc, AD5748ACPZ Datasheet - Page 31

ZDPLC +/-24V DRIVER

AD5748ACPZ

Manufacturer Part Number
AD5748ACPZ
Description
ZDPLC +/-24V DRIVER
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5748ACPZ

Amplifier Type
Instrumentation
Number Of Circuits
1
Slew Rate
2 V/µs
Current - Output / Channel
15mA
Voltage - Supply, Single/dual (±)
±12 V ~ 24 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
*
No. Of Amplifiers
3
Supply Voltage Range
± 12V To ± 24V
Supply Current
5.2mA
Amplifier Case Style
LFCSP
No. Of Pins
32
Operating Temperature Range
-40°C To +105°C
Svhc
No
Rohs Compliant
Yes
Bandwidth
100kHz
Amplifier Output
Differential
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Output Type
-
Gain Bandwidth Product
-
-3db Bandwidth
-
Current - Input Bias
-
Voltage - Input Offset
-
Current - Supply
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
GALVANICALLY ISOLATED INTERFACE
In many process control applications, it is necessary to provide
an isolation barrier between the controller and the unit being
controlled to protect and isolate the controlling circuitry from
any hazardous common-mode voltages that may occur. The
iCoupler® family of products from Analog Devices, Inc., provides
voltage isolation in excess of 5.0 kV. The serial loading structure
of the AD5748 makes it ideal for isolated interfaces because the
number of interface lines is kept to a minimum. Figure 56 shows
a 4-channel isolated interface using an ADuM1400. For further
information, visit www.analog.com/icouplers.
1
ADDITIONAL PINS OMITTED FOR CLARITY.
CONTROLLER
CONTROL OUT
CLOCK OUT
DATA OUT
SYNC OUT
SERIAL
SERIAL
V
V
V
V
IA
IB
IC
ID
ADuM1400
Figure 56. Isolated Interface
1
V
V
V
V
OA
OB
OC
OD
TO
SCLK
TO
SDIN
TO
SYNC
TO
CLEAR
Rev. A | Page 31 of 32
MICROPROCESSOR INTERFACING
Microprocessor interfacing to the AD5748 is via a serial bus
that uses a protocol compatible with microcontrollers and DSP
processors. The communications channel is a 3-wire (minimum)
interface consisting of a clock signal, a data signal, and a SYNC
signal. The AD5748 requires a 16-bit data-word with data valid
on the falling edge of SCLK.
AD5748

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