FDS4141 Fairchild Semiconductor, FDS4141 Datasheet - Page 2

• Manufacturer Part Number: FDS4141
• Description: MOSFET P-CH 40V 10.8A 8-SOIC
• Manufacturer: Fairchild Semiconductor
• Series: PowerTrench®r

Specifications of FDS4141

• Fet Type: MOSFET P-Channel, Metal Oxide
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 13 mOhm @ 10.5A, 10V
• Drain To Source Voltage (vdss): 40V
• Current - Continuous Drain (id) @ 25° C: 10.8A
• Vgs(th) (max) @ Id: 3V @ 250µA
• Gate Charge (qg) @ Vgs: 49nC @ 10V
• Input Capacitance (ciss) @ Vds: 2670pF @ 20V
• Power - Max: 2.5W
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Configuration: Single Quad Drain Triple Source
• Transistor Polarity: P-Channel
• Resistance Drain-source Rds (on): 0.013 Ohm @ 10 V
• Drain-source Breakdown Voltage: 40 V
• Gate-source Breakdown Voltage: +/- 20 V
• Continuous Drain Current: 10.8 A
• Power Dissipation: 5000 mW
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: FDS4141TR

©2007 Fairchild Semiconductor Corporation
FDS4141 Rev.C
Electrical Characteristics
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
NOTES:
1. R
2. Pulse Test: Pulse Width < 300µs, Duty cycle < 2.0%.
3. UIL condition: Starting T
BV
∆BV
I
I
V
r
g
C
C
C
R
t
t
t
t
Q
Q
Q
Q
V
t
Q
∆V
DSS
GSS
∆T
d(on)
r
d(off)
f
rr
DS(on)
FS
the user's board design.
GS(th)
SD
iss
oss
rss
g
∆T
g
g
gs
gd
rr
Symbol
θJA
DSS
J
GS(th)
DSS
J
is determined with the device mounted on a 1in
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
J
= 25°C, L = 3mH, I
Parameter
AS
= -14A, V
2
T
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
J
a) 50°C/W when mounted on a
= 25°C unless otherwise noted
DD
1in
2
= -40V, V
pad of 2 oz copper.
GS
= -10V.
V
V
V
V
V
I
V
V
V
V
V
f = 1MHz
f = 1MHz
I
I
V
V
V
V
I
D
D
D
F
GS
GS
GS
GS
DD
DD
GS
GS
GS
DS
GS
DS
GS
GS
= -250µA, referenced to 25°C
= -10.5A, di/dt = 100A/µs
= -250µA, V
= -250µA, referenced to 25°C
= 0V to -10V
= 0V to -5V
= -20V, V
= -20V, I
= -10V, R
= -32V,
= V
= -10V, I
= -4.5V, I
= -10V, I
= -5V, I
= 0V, I
= 0V, I
= ±20V, V
2
DS
Test Conditions
, I
S
S
D
D
= -10.5A
= -2.1A
D
D
D
D
GS
GEN
= -10.5A
GS
DS
= -10.5A,
= -250µA
= -10.5A
= -8.4A
= -10.5A, T
= 0V,
= 0V
= 0V
= 6Ω
V
I
D
DD
= -10.5A
= -20V,
J
(Note 2)
(Note 2)
= 125°C
θJC
is guaranteed by design while R
b) 125°C/W when mounted on a
minimum pad.
Min
-1.0
-40
2005
15.2
16.8
-0.8
-0.7
11.0
Typ
-1.6
355
190
-33
5.3
26
14
10
42
12
35
19
37
5
6
7
5
2670
θCA
±100
-1.3
-1.2
Max
13.0
19.0
19.9
-3.0
475
285
www.fairchildsemi.com
20
10
68
22
49
27
42
26
-1
is determined by
mV/°C
mV/°C
Units
mΩ
nC
nC
nC
nC
nC
µA
nA
pF
pF
pF
ns
ns
ns
ns
ns
Ω
V
V
V
S