FDMS6681Z Fairchild Semiconductor, FDMS6681Z Datasheet - Page 4
![MOSFET P-CH 30V 21.1A POWER56](/photos/5/47/54749/fdms6681z_sml.jpg)
FDMS6681Z
Manufacturer Part Number
FDMS6681Z
Description
MOSFET P-CH 30V 21.1A POWER56
Manufacturer
Fairchild Semiconductor
Series
PowerTrench®r
Datasheet
1.FDMS6681Z.pdf
(7 pages)
Specifications of FDMS6681Z
Fet Type
MOSFET P-Channel, Metal Oxide
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
3.2 mOhm @ 22.1A, 10V
Drain To Source Voltage (vdss)
30V
Current - Continuous Drain (id) @ 25° C
21.1A
Vgs(th) (max) @ Id
3V @ 250µA
Gate Charge (qg) @ Vgs
241nC @ 10V
Input Capacitance (ciss) @ Vds
10380pF @ 15V
Power - Max
2.5W
Mounting Type
Surface Mount
Package / Case
8-PQFN, Power56
Configuration
Single Quad Drain Triple Source
Transistor Polarity
P-Channel
Resistance Drain-source Rds (on)
0.0035 Ohms
Drain-source Breakdown Voltage
- 30 V
Gate-source Breakdown Voltage
+/- 25 V
Continuous Drain Current
21.1 A
Power Dissipation
2.5 W
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
FDMS6681ZTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
FDMS6681Z
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
©2009 Fairchild Semiconductor Corporation
FDMS6681Z Rev.C4
Typical Characteristics
0.01
100
0.1
100
10
10
50
Figure 7.
0.001
1
8
6
4
2
0
0.01
1
0
THIS AREA IS
LIMITED BY r
I
Figure 9. Unclamped Inductive
D
Figure 11.
= -22.1 A
-V
0.01
Switching Capability
DS
Gate Charge Characteristics
0.1
50
t
, DRAIN to SOURCE VOLTAGE (V)
AV
Operating Area
DS(on)
SINGLE PULSE
T
R
T
, TIME IN AVALANCHE (ms)
J
A
V
JA
Forward Bias Safe
Q
= MAX RATED
DD
= 25
g
= 125
, GATE CHARGE (nC)
= -10 V
0.1
o
C
T
o
J
100
C/W
1
= 125
T
J
V
= 25
DD
T
o
J
1
C
= -20 V
= 25 °C unless otherwise noted
o
C
V
10
150
DD
T
= -15 V
J
10
= 100
10 ms
100 ms
10 s
1 ms
1 s
DC
o
C
100
200
100
4
20000
10000
1000
1000
100
10
10
10
10
10
10
0.1
600
10
0.001
1
-4
-5
-6
-7
-8
-9
Figure 12.
0.1
0
Figure 8.
f = 1 MHz
V
V
GS
GS
Figure 10.
T
0.01
= 0 V
= 0 V
J
5
= 150
-V
Power Dissipation
V
to Source Voltage
DS
GS ,
Single Pulse Maximum
V
Capacitance vs Drain
, DRAIN TO SOURCE VOLTAGE (V)
t, PULSE WIDTH (sec)
o
GATE TO SOURCE VOLTAGE (V)
GS
C
0.1
10
T
= -10 V
J
= 25
I
1
gss
o
C
15
1
vs V
gss
10
20
SINGLE PULSE
R
T
A
JA
= 25
= 125
www.fairchildsemi.com
o
100
C
10
25
o
C
C
C/W
C
iss
oss
rss
1000
30
30