EVAL-AD5570EBZ Analog Devices Inc, EVAL-AD5570EBZ Datasheet - Page 9

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EVAL-AD5570EBZ

Manufacturer Part Number
EVAL-AD5570EBZ
Description
206-10G-01 Board I.c.
Manufacturer
Analog Devices Inc
Series
0040r
Datasheet

Specifications of EVAL-AD5570EBZ

Number Of Dac's
*
Number Of Bits
16
Outputs And Type
1, Single Ended
Sampling Rate (per Second)
83k
Data Interface
Serial
Settling Time
12µs
Dac Type
*
Voltage Supply Source
Dual ±
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD5570
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 5. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14, 16
15
Mnemonic
V
V
CLR
LDAC
SYNC
SCLK
SDIN
SDO
DGND
PD
AGND
AGNDS
V
REFGND
REFIN
SS
DD
OUT
Description
Negative Analog Supply Voltage. −12 V ± 5% to −15 V ± 10% for specified performance.
Positive Analog Supply Voltage. 12 V ± 5% to 15 V ± 10% for specified performance.
Level Sensitive, Active Low Input. A falling edge of CLR resets V
are untouched.
Active Low Control Input. Transfers the contents of the input register to the DAC register. LDAC can be tied
permanently low, enabling the outputs to be updated on the rising edge of SYNC.
Active Low Control Input. This is the frame synchronization signal for the data. When SYNC goes low, it powers
on the SCLK and SDIN buffers and enables the input shift register. Data is transferred in on the falling edges of
the following 16 clocks.
Serial Clock Input. Data is clocked into the input register on the falling edge of the serial clock input. Data can
be transferred at rates of up to 8 MHz.
Serial Data Input. Data is clocked into the 16-bit register on the falling edge of the serial clock input.
Serial Data Output. Can be used for daisy-chaining a number of devices together or for reading back the data in
the shift register for diagnostic purposes. This is an open-drain output; it must be pulled to logic high with an
external pull-up resistor of ~5 kΩ.
Digital Ground. Ground reference for all digital circuitry.
Active Low Control Input. Allows the DAC to be put into a power-down state.
Analog Ground. Ground reference for all analog circuitry.
Analog Ground Sense. This is normally tied to AGND.
Analog Output Voltage.
Reference Ground. Tie this pin to 0 V.
Voltage Reference Input. This is internally buffered before being applied to the DAC. For bipolar ±10 V output
range, REFIN is 5 V.
LDAC
SYNC
SCLK
SDIN
SDO
CLR
V
V
SS
DD
Figure 5. Pin Configuration
1
2
3
4
5
6
7
8
Rev. C | Page 9 of 24
(Not to Scale)
AD5570
TOP VIEW
16
15
14
13
12
11
10
9
REFGND
REFIN
REFGND
V
AGNDS
AGND
PD
DGND
OUT
OUT
to AGND. The contents of the registers
AD5570

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