EP2SGX90EF1152I4 Altera, EP2SGX90EF1152I4 Datasheet - Page 63

• Manufacturer Part Number: EP2SGX90EF1152I4
• Description: Stratix II GX
• Manufacturer: Altera

Specifications of EP2SGX90EF1152I4

• Family Name: Stratix II GX
• Number Of Logic Blocks/elements: 90960
• # I/os (max): 558
• Frequency (max): 732.1MHz
• Process Technology: SRAM
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 90960
• Ram Bits: 4520448
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FC-FBGA
• Lead Free Status / Rohs Status: Not Compliant

Figure 2–40. Template for Supported Seven-Input Functions in Extended LUT Mode
Note to
(1)
Altera Corporation
October 2007
If the seven-input function is un-registered, the unused eighth input is available for register packing. The second
register, reg1, is not available.
Figure
datae0
datae1
dataf0
dataf1
datac
dataa
datab
datad
(1)
2–40:
This input is available
for register packing.
Arithmetic Mode
The arithmetic mode is ideal for implementing adders, counters,
accumulators, wide parity functions, and comparators. An ALM in
arithmetic mode uses two sets of two four-input LUTs along with two
dedicated full adders. The dedicated adders allow the LUTs to be
available to perform pre-adder logic; therefore, each adder can add the
output of two four-input functions. The four LUTs share the dataa and
datab inputs. As shown in
adder0, and the carry-out from adder0 feeds to carry-in of adder1. The
carry-out from adder1 drives to adder0 of the next ALM in the LAB.
ALMs in arithmetic mode can drive out registered and/or un-registered
versions of the adder outputs.
5-Input
5-Input
LUT
LUT
combout0
Figure
Stratix II GX Device Handbook, Volume 1
2–41, the carry-in signal feeds to
D
reg0
Q
Stratix II GX Architecture
To general or
To general or
local routing
local routing
2–55