AD9864BCPZRL Analog Devices Inc, AD9864BCPZRL Datasheet - Page 4

• Manufacturer Part Number: AD9864BCPZRL
• Description: IC,RF/Baseband Circuit,LLCC,48PIN,PLASTIC
• Manufacturer: Analog Devices Inc

Specifications of AD9864BCPZRL

• Rf Type: UHF, Cellular, GSM, EDGE, TETRA
• Frequency: 10MHz ~ 300MHz
• Features: General Purpose IF Subsystem
• Package / Case: 48-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9864
AD9864 SPECIFICATIONS
Table 1. VDDI = VDDF = VDDA = VDDC = VDDL = VDDH = 2.7 V to 3.6 V, VDDQ = VDDP = 2.7 V to 5.5 V, f
f
setting, synthesizers in normal (not fast acquire) mode, decimation factor = 900, 16-bit digital output, and 10 pF load on SSI output pins.
Parameter
SYSTEM DYNAMIC PERFORMANCE
LNA + MIXER
LO SYNTHESIZER
CLOCK SYNTHESIZER
Σ-∆ ADC
GAIN CONTROL
1
2
3
4
5
IF
This includes 0.9 dB loss of matching network.
AGC with DVGA enabled.
Measured in 10 kHz bandwidth.
Programmable in 0.67 mA steps.
Voltage span in which LO (or CLK) charge pump output current is maintained within 5% of nominal value of VDDP/2 (or VDDQ/2).
= 109.65 MHz, f
SSB Noise Figure @ Minimum VGA Attenuation
@ Maximum VGA Attenuation
Dynamic Range with AGC Enabled
IF Input Clip Point @ Maximum VGA Attenuation
@ Minimum VGA Attenuation
Input Third Order Intercept (IIP3)
Gain Variation over Temperature
Maximum RF and LO Frequency Range
LNA Input Impedance
Mixer LO Input Resistance
LO Input Frequency
LO Input Amplitude
FREF Frequency (for Sinusoidal Input Only)
FREF Input Amplitude
FREF Slew Rate
Minimum Charge Pump Current @ 5 V
Maximum Charge Pump Current @ 5 V
Charge Pump Output Compliance
Synthesizer Resolution
CLK Input Frequency
CLK Input Amplitude
Minimum Charge Pump Output Current
Maximum Charge Pump Output Current
Charge Pump Output Compliance
Synthesizer Resolution
Resolution
Clock Frequency (f
Center Frequency
Pass-Band Gain Variation
Alias Attenuation
Programmable Gain Step
AGC Gain Range
GCP Output Resistance
LO
= 107.4 MHz, f
CLK
)
3
2,3
1
REF
5
5
2,3
= 16.8 MHz, unless otherwise noted. Standard operating mode: VGA at minimum attenuation
4
4
4
4
2, 3
3
Temperature
Full
Full
Full
Full
Full
Full
Full
Full
25°C
25°C
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Rev. 0 | Page 4 of 44
Test Level
IV
IV
IV
IV
IV
IV
IV
IV
V
V
IV
IV
IV
IV
IV
VI
VI
VI
IV
IV
IV
VI
VI
VI
VI
IV
IV
V
IV
IV
V
V
IV
Min
91
–20
–32
–12
300
7.75
0.3
8
0.3
7.5
0.4
6.25
13
0.3
0.4
2.2
16
13
80
50
13
Typ
7.5
95
–19
–31
–7.0
0.7
500
370||1.4
1
0.67
5.3
0.67
5.3
f
16
12
72.5
CLK
/8
CLK
Max
9.5
2
300
2.0
25
3
VDDP – 0.4
26
VDDC
VDDQ – 0.4
24
26
1.0
95
= 18 MSPS,
Unit
dB
dB
dB
dBm
dBm
dBm
dB
MHz
Ω||pF
kΩ
MHz
V p-p
MHz
V p-p
V/µs
mA
mA
V
kHz
MHz
V p-p
mA
mA
V
kHz
Bits
MHz
MHz
dB
dB
dB
dB
kΩ