AD7631BCPZ Analog Devices Inc, AD7631BCPZ Datasheet - Page 8

• Manufacturer Part Number: AD7631BCPZ
• Description: IC,A/D CONVERTER,SINGLE,18-BIT,CMOS,LLCC,48PIN
• Manufacturer: Analog Devices Inc
• Series: PulSAR®r

Specifications of AD7631BCPZ

• Number Of Bits: 18
• Sampling Rate (per Second): 250k
• Data Interface: Serial, Parallel
• Number Of Converters: 1
• Power Dissipation (max): 120mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-VFQFN, CSP Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD7631
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 6. Pin Function Descriptions
Pin No.
1, 42
2, 44
3, 4
5
6, 7, 17
8
9
10
Mnemonic
AGND
AVDD
MODE[0:1]
D0/OB/2C
OGND
D1/A0
D2/A1
D3
Type
P
P
DI
DI/O
P
DI/O
DI/O
DO
2
1
Description
Analog Power Ground Pins. Ground reference point for all analog I/O. All analog I/O should be
referenced to AGND and should be connected to the analog ground plane of the system. In addition,
the AGND, DGND, and OGND voltages should be at the same potential.
Analog Power Pins. Nominally 4.75 V to 5.25 V and decoupled with 10 μF and 100 nF capacitors.
Data Input/Output Interface Mode Selection.
Interface Mode
0
1
2
3
In 18-bit parallel mode, this output is used as Bit 0 of the parallel port data output bus, and the data
coding is straight binary. In all other modes, this pin allows the choice of straight binary or twos
complement.
When OB/2C = high, the digital output is straight binary.
When OB/2C = low, the MSB is inverted resulting in a twos complement output from its internal
shift register.
Input/Output Interface Digital Power Ground. Ground reference point for digital outputs. Should
be connected to the system digital ground ideally at the same potential as AGND and DGND.
When MODE[1:0] = 0, this pin is Bit 1 of the parallel port data output bus. In all other modes, this
input pin controls the form in which data is output as shown in Table 7.
When MODE[1:0] = 0, this pin is Bit 2 of the parallel port data output bus.
When MODE[1:0] = 1 or 2, this input pin controls the form in which data is output as shown in Table 7.
When MODE[1:0] = 0, 1, or 2, this output is used as Bit 3 of the parallel port data output bus.
This pin is always an output, regardless of the interface mode.
D4/DIVSCLK[0]
D5/DIVSCLK[1]
NOTES
1. FOR THE LEAD FRAME CHIP SCALE PACKAGE (LFCSP), THE EXPOSED PAD
SHOULD BE CONNECTED TO VEE. THIS CONNECTION IS NOT REQUIRED TO
MEET THE ELECTRICAL PERFORMANCES.
D0/OB/2C
MODE0
MODE1
AGND
OGND
OGND
D1/A0
AVDD
D2/A1
D3
10
11
12
1
2
3
4
5
6
7
8
9
48 47 46 45 44 43 42 41 40 39 38 37
13 14 15 16 17 18 19 20 21 22 23 24
PIN 1
Figure 4. Pin Configuration
Rev. A | Page 8 of 32
Low
Low
High
High
MODE1
(Not to Scale)
TOP VIEW
AD7631
MODE0
Low
High
Low
High
36
35
34
33
32
31
30
29
28
27
26
25
Description
18-bit interface
16-bit interface
8-bit (byte) interface
Serial interface
BIPOLAR
CNVST
PD
RESET
CS
RD
TEN
BUSY
D17/SCCS
D16/SCCLK
D15/SCIN
D14/HW/SW