AD7631BCPZ Analog Devices Inc, AD7631BCPZ Datasheet - Page 18

IC,A/D CONVERTER,SINGLE,18-BIT,CMOS,LLCC,48PIN

AD7631BCPZ

Manufacturer Part Number
AD7631BCPZ
Description
IC,A/D CONVERTER,SINGLE,18-BIT,CMOS,LLCC,48PIN
Manufacturer
Analog Devices Inc
Series
PulSAR®r
Datasheet

Specifications of AD7631BCPZ

Number Of Bits
18
Sampling Rate (per Second)
250k
Data Interface
Serial, Parallel
Number Of Converters
1
Power Dissipation (max)
120mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN, CSP Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD7631
TRANSFER FUNCTIONS
Using the D0/OB/ 2C digital input or via the configuration
register, except in 18-bit parallel interface mode, the AD7631
offers two output codings: straight binary and twos
complement. See
characteristic and digital output codes for the different analog
input ranges, V
register, the D0/OB/
to either high or low.
Table 8. Output Codes and Ideal Input Voltages
Description
FSR − 1 LSB
FSR − 2 LSB
Midscale + 1 LSB
Midscale
Midscale − 1 LSB
−FSR + 1 LSB
−FSR
1
2
This is also the code for overrange analog input.
This is also the code for underrange analog input.
111...111
111...110
111...101
000...010
000...001
000...000
–FSR + 0.5 LSB
–FSR
IN
Figure 26. ADC Ideal Transfer Function
. Note that when using the configuration
Figure 26
–FSR + 1 LSB
2C input is a don’t care and should be tied
V
(10 V p-p)
+4.999962 V
+4.999924 V
+38.15 μV
0 V
−38.15 μV
−4.999962 V
−5 V
IN
= 0 V to 5 V
and
ANALOG INPUT
Table 8
for the ideal transfer
V
(20 V p-p)
+9.999924 V
+9.999847 V
−76.29 μV
0 V
−76.29 μV
−9.999924 V
−10 V
+FSR – 1.5 LSB
IN
= 0 V to 10 V
+FSR – 1 LSB
V
REF
= 5 V
V
(20 V p-p)
+9.999924 V
+9.999847 V
−76.29 μV
0 V
−76.29 μV
−9.999924 V
−10 V
Rev. A | Page 18 of 32
IN
= ±5 V
TYPICAL CONNECTION DIAGRAM
Figure 27 shows a typical connection diagram for the AD7631
using the internal reference, serial data interface, and serial
configuration port. Different circuitry from that shown in
Figure 27 is optional and is discussed in the following sections.
V
(40 V p-p)
+19.999847 V
+19.999695 V
+152.59 μV
0 V
−152.59 μV
−19.999847 V
−20 V
IN
= ±10 V
Straight Binary
0x3FFFF
0x3FFFE
0x20001
0x20000
0x1FFFF
0x00001
0x00000
1
2
Digital Output Code
Twos Complement
0x1FFFF
0x1FFFE
0x00001
0x00000
0x3FFFF
0x20001
0x20000
1
2

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