MPU-6000 INVENSENSE, MPU-6000 Datasheet - Page 36

• Manufacturer Part Number: MPU-6000
• Description: IC, GYRO/ACCEL, 9-AXIS FUSION, PROG
• Manufacturer: INVENSENSE

Specifications of MPU-6000

• Acceleration Range: ± 2g, ± 4g, ± 8g
• No. Of Axes: 9
• Sensor Case Style: QFN
• No. Of Pins: 24
• Supply Voltage Range: 2.5V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Interface: I2C, SPI
• Interface Type: I2C, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.5
SPI is a 4-wire synchronous serial interface that uses two control and two data lines. The MPU-6000 always
operates as a Slave device during standard Master-Slave SPI operation. With respect to the Master, the
Serial Clock output (SCLK), the Data Output (SDO) and the Data Input (SDI) are shared among the Slave
devices. The Master generates an independent Chip Select (/CS) for each Slave device; /CS goes low at the
start of transmission and goes back high at the end. The Serial Data Output (SDO) line remains in a high-
impedance (high-z) state when the device is not selected so it does not interfere with any active devices.
SPI Operational Features
Each SPI slave requires its own Chip Select (/CS) line. SDO, SDI and SCLK lines are shared. Only one /CS
line is active (low) at a time ensuring that only one slave is selected at a time. The /CS lines of other slaves
are held high which causes their respective SDO pins to be high-Z.
CONFIDENTIAL & PROPRIETARY
SPI Interface (MPU-6000 only)
1. Data is delivered MSB first and LSB last
2. Data is latched on rising edge of SCLK
3. Data should be transitioned on the falling edge of SCLK
4. SCLK frequency is 1MHz max
5. SPI read and write operations are completed in 16 or more clock cycles (two or more bytes). The
6. Supports Single or Burst Read/Writes.
first byte contains the SPI Address, and the following byte(s) contain(s) the SPI data. The first
bit of the first byte contains the Read/Write bit and indicates the Read (1) or Write (0) operation.
The following 7 bits contain the Register Address. In cases of multiple-byte Read/Writes, data is
two or more bytes:
MPU-6000/MPU-6050 Product Specification
SPI Address format
SPI Data format
MSB
MSB
R/W
SPI Master
D7
Typical SPI Master / Slave Configuration
D6
A6
D5
/CS1
/CS2
A5
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D4
A4
A3
D3
SCLK
SCLK
SDO
SDO
SDI
/CS
SDI
/CS
A2
D2
SPI Slave 1
SPI Slave 2
A1
D1
LSB
A0
LSB
D0
Document Number: PS-MPU-6000A-00
Revision: 1.0
Release Date: 11/24/2010