4432-T-B1 B 470 Silicon Laboratories Inc, 4432-T-B1 B 470 Datasheet - Page 22

• Manufacturer Part Number: 4432-T-B1 B 470
• Description: RF Modules & Development Tools Tx/Rx Split 4432 TRx Testcard
• Manufacturer: Silicon Laboratories Inc

Specifications of 4432-T-B1 B 470

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Si4430/31/32-B1
3.2.3. TX State
The TX state may be entered from any of the IDLE modes when the txon bit is set to 1 in "Register 07h. Operating
Mode and Function Control 1". A built-in sequencer takes care of all the actions required to transition between
states from enabling the crystal oscillator to ramping up the PA. The following sequence of events will occur
automatically when going from STANDBY mode to TX mode by setting the txon bit.
1. Enable the main digital LDO and the Analog LDOs.
2. Start up crystal oscillator and wait until ready (controlled byan internal timer).
3. Enable PLL.
4. Calibrate VCO (this action is skipped when the skipvco bit is 1, default value is 0).
5. Wait until PLL settles to required transmit frequency (controlled by an internal timer).
6. Activate power amplifier and wait until power ramping is completed (controlled by an internal timer).
7. Transmit packet.
Steps in this sequence may be eliminated depending on which IDLE mode the chip is configured to prior to setting
the txon bit. By default, the VCO and PLL are calibrated every time the PLL is enabled.
3.2.4. RX State
The RX state may be entered from any of the IDLE modes when the rxon bit is set to 1 in "Register 07h. Operating
Mode and Function Control 1". A built-in sequencer takes care of all the actions required to transition from one of
the IDLE modes to the RX state. The following sequence of events will occur automatically to get the chip into RX
mode when going from STANDBY mode to RX mode by setting the rxon bit:
1. Enable the main digital LDO and the Analog LDOs.
2. Start up crystal oscillator and wait until ready (controlled by an internal timer).
3. Enable PLL.
4. Calibrate VCO (this action is skipped when the skipvco bit is 1, default value is 0).
5. Wait until PLL settles to required receive frequency (controlled by an internal timer).
6. Enable receive circuits: LNA, mixers, and ADC.
7. Enable receive mode in the digital modem.
Depending on the configuration of the radio all or some of the following functions will be performed automatically by
the digital modem: AGC, AFC (optional), update status registers, bit synchronization, packet handling (optional)
including sync word, header check, and CRC.
3.2.5. Device Status
Add R/W Function/Description
D7
D6
D5
D4
D3
D2
D1
D0
POR Def.
02
R
Device Status
ffovfl
ffunfl
rxffem
headerr
freqerr
cps[1] cps[0]
—
The operational status of the chip can be read from "Register 02h. Device Status".
22
Rev 1.1