Si5355-EVB Silicon Laboratories Inc, Si5355-EVB Datasheet - Page 13

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Si5355-EVB

Manufacturer Part Number
Si5355-EVB
Description
Clock & Timer Development Tools Si5355 custom clk eval board
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of Si5355-EVB

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3.8. CMOS Output Drivers
The Si5355 has 4 banks of outputs with each bank comprised of 2 clocks for a total of 8 CMOS outputs per device.
Each of the output banks can operate from a different VDDO supply (1.8 V, 2.5 V, 3.3 V), simplifying usage in
mixed supply applications. All clock outputs between 1 and 200 MHz are in-phase to within ±150 ps. When an
output bank is disabled using any of the OEB functions, the clock outputs are stopped low.
The CMOS output driver has a controlled impedance in the range of 42 to 50 which includes an internal 22 
series resistor. An external series resistor is not needed when driving 50  traces. If higher impedance traces are
used then a series resistor may be added. A typical configuration is shown in Figure 5.
PLL
Figure 5. CMOS Output Driver Configuration
Bank C
Bank D
Bank A
Bank B
MultiSynth
MultiSynth
MultiSynth
MultiSynth
Si5356
Rev. 0.3
VDDOC
VDDOD
VDDOA
CLK0
CLK1
VDDOB
CLK2
CLK3
CLK4
CLK5
CLK6
CLK7
+1.8V, +2.5V, +3.3V
+1.8V, +2.5V, +3.3V
+1.8V, +2.5V, +3.3V
+1.8V, +2.5V, +3.3V
50
50
50
50
50
50
50
50
Si5355
13

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