CDB42438 Cirrus Logic Inc, CDB42438 Datasheet - Page 41

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CDB42438

Manufacturer Part Number
CDB42438
Description
Eval Bd 108dB 6&8ch Multi-Chnl CODECs
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB42438

Main Purpose
Audio, CODEC
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
CS42438
Primary Attributes
6 Single-Ended and 2 Differential Analog Inputs and 8 Outputs, S/PDIF Transmitter and Receiver
Secondary Attributes
Graphic User Interface
Description/function
Audio CODECs
Operating Supply Voltage
5 V to 12 V
Product
Audio Modules
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
CS42438
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant, Contains lead / RoHS non-compliant
Other names
598-1500
DS646F2
7. REGISTER DESCRIPTION
All registers are read/write except for the I.D. and Revision Register and Interrupt Status Register which are read
only. See the following bit-definition tables for bit assignment information. The default state of each bit after a power-
up sequence or reset is listed in each bit description.
7.1
7.1.1
7.1.2
7.2
7.2.1
7.2.2
Chip_ID3
INCR
7
7
Memory Address Pointer (MAP)
Not a register
Chip I.D. and Revision Register (Address 01h) (Read Only)
Increment (INCR)
Default = 1
Function:
Memory address pointer auto increment control
0 - MAP is not incremented automatically.
1 - Internal MAP is automatically incremented after each read or write.
Memory Address Pointer (MAP[6:0])
Default = 0000001
Function:
Memory address pointer (MAP). Sets the register address that will be read or written by the control port.
Chip I.D. (CHIP_ID[3:0])
Default = 0000
Function:
I.D. code for the CS42438. Permanently set to 0000.
Chip Revision (REV_ID[3:0])
Default = 0001
Function:
CS42438 revision level. Revision A is coded as 0001.
Chip_ID2
MAP6
6
6
Chip_ID1
MAP5
5
5
Chip_ID0
MAP4
4
4
Rev_ID3
MAP3
3
3
Rev_ID2
MAP2
2
2
Rev_ID1
MAP1
1
1
CS42438
Rev_ID0
MAP0
0
0
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