EVAL-ADF4360-7EBZ1 Analog Devices Inc, EVAL-ADF4360-7EBZ1 Datasheet

PLL/Frequency Synthesizer EVAL BOARD

EVAL-ADF4360-7EBZ1

Manufacturer Part Number
EVAL-ADF4360-7EBZ1
Description
PLL/Frequency Synthesizer EVAL BOARD
Manufacturer
Analog Devices Inc
Datasheet

Specifications of EVAL-ADF4360-7EBZ1

Silicon Manufacturer
Analog Devices
Application Sub Type
Integer-N Synthesizer
Kit Application Type
Clock & Timing
Silicon Core Number
ADF4360-7
Kit Contents
Board
Main Purpose
Timing, Frequency Synthesizer
Embedded
No
Utilized Ic / Part
ADF4360-7
Primary Attributes
Single Integer-N PLL with VCO
Secondary Attributes
900MHz, 200kHz PFD
Frequency
1.8GHz
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
EVAL-ADF4360-7EB1
EVAL-ADF4360-7EB1
Q5173330
Q5652985
FEATURES
Output frequency range: 350 MHz to 1800 MHz
Divide-by-2 output
3.0 V to 3.6 V power supply
1.8 V logic compatibility
Integer-N synthesizer
Programmable dual-modulus prescaler 8/9, 16/17
Programmable output power level
3-wire serial interface
Analog and digital lock detect
Hardware and software power-down mode
APPLICATIONS
Wireless handsets (DECT, GSM, PCS, DCS, WCDMA)
Test equipment
Wireless LANs
CATV equipment
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
REF
DATA
CLK
LE
IN
ADF4360-7
N = (BP + A)
PRESCALER
P/P+1
DATA REGISTER
24-BIT
COUNTER
14-BIT R
LOAD
LOAD
REGISTER
FUNCTIONAL BLOCK DIAGRAM
COUNTER
COUNTER
INTEGER
13-BIT B
5-BIT A
AGND
FUNCTION
AV
24-BIT
LATCH
DD
DV
DGND
Figure 1.
DD
DETECT
COMPARATOR
LOCK
PHASE
Integrated Synthesizer and VCO
R
DIVSEL = 1
DIVSEL = 2
SET
GENERAL DESCRIPTION
The ADF4360-7 is an integrated integer-N synthesizer and
voltage controlled oscillator (VCO). The ADF4360-7 center
frequency is set by external inductors. This allows a frequency
range of between 350 MHz to 1800 MHz. In addition, a divide-
by-2 option is available, whereby the user receives an RF output
of between 175 MHz and 900 MHz.
Control of all the on-chip registers is through a simple 3-wire
interface. The device operates with a power supply ranging from
3.0 V to 3.6 V and can be powered down when not in use.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
CPGND
MULTIPLEXER
CE
CHARGE
PUMP
CORE
VCO
MUTE
© 2004 Analog Devices, Inc. All rights reserved.
OUTPUT
STAGE
÷2
MUXOUT
CP
V
V
RF
RF
ADF4360-7
L1
L2
C
C
VCO
TUNE
C
N
OUT
OUT
A
B
www.analog.com

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EVAL-ADF4360-7EBZ1 Summary of contents

Page 1

FEATURES Output frequency range: 350 MHz to 1800 MHz Divide-by-2 output 3 3.6 V power supply 1.8 V logic compatibility Integer-N synthesizer Programmable dual-modulus prescaler 8/9, 16/17 Programmable output power level 3-wire serial interface Analog and digital lock ...

Page 2

ADF4360-7 TABLE OF CONTENTS Specifications..................................................................................... 3 Timing Characteristics..................................................................... 5 Absolute Maximum Ratings............................................................ 6 Transistor Count........................................................................... 6 ESD Caution.................................................................................. 6 Pin Configuration and Function Descriptions............................. 7 Typical Performance Characteristics ............................................. 8 Circuit Description......................................................................... 10 Reference Input Section............................................................. 10 Prescaler (P/P + ...

Page 3

SPECIFICATIONS 3.3 V ± 10%; AGND = DGND = VCO Table 1. Parameter REF CHARACTERISTICS IN REF Input Frequency IN REF Input Sensitivity IN REF Input Capacitance IN ...

Page 4

... REFIN PFD MHz MHz 500; loop B kHz. REFIN PFD 13 The spurious signals are measured with the EVAL-ADF4360-xEB1 Evaluation Board and the HP 8562E Spectrum Analyzer. The Spectrum Analyzer provides the REF for the synthesizer MHz @ 0 dBm. REFOUT B Version Unit Conditions/Comments 1800 MHz ...

Page 5

TIMING CHARACTERISTICS 3.3 V ± 10%; AGND = DGND = 0 V; 1.8 V and 3 V logic levels used VCO Table 2. Parameter Limit MIN MAX ...

Page 6

ADF4360-7 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 3. Parameter GND GND VCO VCO DD Digital I/O Voltage to GND Analog I/O ...

Page 7

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 4. Pin Function Descriptions Pin No. Mnemonic Function 1 CPGND Charge Pump Ground. This is the ground return path for the charge pump Analog Power Supply. This ranges from 3 ...

Page 8

ADF4360-7 TYPICAL PERFORMANCE CHARACTERISTICS –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 –140 –150 100 1k 10k 100k FREQUENCY OFFSET (Hz) Figure 4. Open-Loop VCO Phase Noise, L1 –70 –75 –80 –85 –90 –95 ...

Page 9

FREQUENCY OFFSET (Hz) Figure 10. Open-Loop VCO Phase Noise, L1 and L2 = 1.0 nH –70 –75 –80 –85 –90 –95 –100 –105 –110 ...

Page 10

ADF4360-7 CIRCUIT DESCRIPTION REFERENCE INPUT SECTION The reference input stage is shown in Figure 16. SW1 and SW2 are normally closed switches. SW3 is normally open. When power-down is initiated, SW3 is closed, and SW1 and SW2 are opened. This ...

Page 11

MUXOUT AND LOCK DETECT The output multiplexer on the ADF4360 family allows the user to access various internal points on the chip. The state of MUXOUT is controlled by M3, M2, and M1 in the function latch. The full truth ...

Page 12

ADF4360-7 After band selection, normal PLL action resumes. The value determined by the value of inductors used V (see the Choosing the Correct Inductance section). If divide-by- 2 operation has been selected (by programming DIV2 [DB22] high ...

Page 13

LATCH STRUCTURE Table 6 shows the three on-chip latches for the ADF4360 family. The two LSBs decide which latch is programmed. Table 6. Latch Structure PRESCALER CURRENT VALUE SETTING 2 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 ...

Page 14

ADF4360-7 Table 7. Control Latch PRESCALER CURRENT VALUE SETTING 2 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 P2 P1 PD2 PD1 CPI6 CPI5 CPI4 CPI6 CPI5 CPI3 CPI2 ...

Page 15

Table 8. N Counter Latch DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DIV2 CPG B13 B12 B11 B10 DIVSEL B13 B12 B11 ...

Page 16

ADF4360-7 Table 9. R Counter Latch BAND BACKLASH SELECT CLOCK DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 RSV RSV BSC2 BSC1 TMB LDP ABP2 TEST MODE BIT SHOULD BE SET TO 0 FOR ...

Page 17

POWER-UP Power-Up Sequence The correct programming sequence for the ADF4360-7 after power-up is counter latch 2. Control latch 3. N counter latch Initial Power-Up Initial power-up refers to programming the part after the application of voltage to the ...

Page 18

ADF4360-7 Hardware Power-Up/Power-Down If the part is powered down via the hardware (using the CE pin) and powered up again without any change to the N counter register during power-down, the part locks at the correct fre- quency, because the ...

Page 19

CONTROL LATCH With (C2, C1) = (0,0), the control latch is programmed. Table 7 shows the input data format for programming the control latch. Prescaler Value In the ADF4360 family, P2 and P1 in the control latch set the prescaler ...

Page 20

ADF4360-7 N COUNTER LATCH Table 8 shows the input data format for programming the N counter latch. A Counter Latch program the 5-bit A counter. The divide range is 0 (00000 (11111). Reserved Bits DB7 ...

Page 21

APPLICATIONS FREQUENCY GENERATOR The wide frequency range of the AD4360-7, plus the on-chip divider, make it an ideal choice for implementing any general purpose clock generator or LO. To implement a clock generator in the FM band necessary ...

Page 22

ADF4360-7 CHOOSING THE CORRECT INDUCTANCE VALUE The ADF4360-7 can be used at many different frequencies simply by choosing the external inductors to give the correct output frequency. Figure 24 shows a graph of both minimum and maximum frequency vs. the ...

Page 23

INTERFACING The ADF4360 family has a simple SPI®-compatible serial inter- face for writing to the device. CLK, DATA, and LE control the data transfer. When LE goes high, the 24 bits that have been clocked into the appropriate register on ...

Page 24

... ADF4360-7 using 3.9 nH. For other frequencies, a tuned LC is recommended. Both complementary architectures can be examined using the EVAL-ADF4360-7EB1 evaluation board. If the user does not need the differential outputs available on the ADF4360-7, the user may either terminate the unused output or combine both outputs using a balun ...

Page 25

... MHz to 1800 MHz Rev Page 0.60 MAX PIN 1 INDICATOR 2.45 EXPOSED 2.30 SQ PAD (BO TTOMVIEW) 2. 0.23 MIN 2.50 REF Package Description Package Option 24-Lead VQ_LFCSP CP-24-2 24-Lead VQ_LFCSP CP-24-2 24-Lead VQ_LFCSP CP-24-2 24-Lead VQ_LFCSP CP-24-2 24-Lead VQ_LFCSP CP-24-2 24-Lead VQ_LFCSP CP-24-2 Evaluation Board ADF4360-7 ...

Page 26

ADF4360-7 NOTES Rev Page ...

Page 27

NOTES Rev Page ADF4360-7 ...

Page 28

ADF4360-7 NOTES Purchase of licensed components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I 2 Rights to use these components system, ...

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