PIC18C601-I/PT Microchip Technology, PIC18C601-I/PT Datasheet - Page 250
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18C601-I/PT
Manufacturer Part Number
PIC18C601-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18C601-IL.pdf
(320 pages)
3.PIC18C601-IL.pdf
(10 pages)
4.PIC18C601-IL.pdf
(10 pages)
Specifications of PIC18C601-I/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
26
Program Memory Type
ROMless
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Processor Series
PIC18C
Core
PIC
Data Bus Width
8 bit
Program Memory Size
256 KB
Data Ram Size
1.5 KB
Interface Type
3-Wire, I2C, SPI, USART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
26
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC18C601I/PT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18C601-I/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
Company:
Part Number:
PIC18C601-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18C601-IL PDF datasheet #2
- PIC18C601-IL PDF datasheet #3
- PIC18C601-IL PDF datasheet #4
- Current page: 250 of 320
- Download datasheet (6Mb)
PIC18C601/801
SLEEP
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
† If WDT causes wake-up, this bit is cleared.
DS39541A-page 250
Before Instruction
After Instruction
Decode
TO =
PD =
TO =
PD =
Q1
?
?
1 †
0
operation
Enter SLEEP mode
[ label ] SLEEP
None
00h
0
1
0
TO, PD
The power-down status bit (PD) is
cleared. The time-out status bit
(TO) is set. Watchdog Timer and
its postscaler are cleared.
The processor is put into SLEEP
mode with the oscillator stopped.
1
1
SLEEP
No
Q2
0000
WDT postscaler,
TO,
PD
WDT,
0000
Process
Data
Q3
0000
Advance Information
Go to
sleep
Q4
0011
SUBFWB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Decode
Q1
register ’f’
Subtract f from WREG with borrow
[ label ] SUBFWB f [,d [,a]]
0
d
a
(WREG) – (f) – (C)
N,OV, C, DC, Z
Subtract register 'f' and carry flag
(borrow) from WREG (2’s comple-
ment method). If 'd' is 0, the result is
stored in WREG. If 'd' is 1, the result
is stored in register 'f' (default) . If ’a’
is 0, the Access Bank will be
selected, overriding the BSR value.
If ’a’ is 1, the Bank will be selected
as per the BSR value.
1
1
Read
0101
Q2
f
[0,1]
[0,1]
2001 Microchip Technology Inc.
255
01da
Process
Data
Q3
ffff
dest
destination
Write to
Q4
ffff
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