PIC18C601-I/PT Microchip Technology, PIC18C601-I/PT Datasheet - Page 144
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18C601-I/PT
Manufacturer Part Number
PIC18C601-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18C601-IL.pdf
(320 pages)
3.PIC18C601-IL.pdf
(10 pages)
4.PIC18C601-IL.pdf
(10 pages)
Specifications of PIC18C601-I/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
26
Program Memory Type
ROMless
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Processor Series
PIC18C
Core
PIC
Data Bus Width
8 bit
Program Memory Size
256 KB
Data Ram Size
1.5 KB
Interface Type
3-Wire, I2C, SPI, USART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
26
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC18C601I/PT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18C601-I/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
Company:
Part Number:
PIC18C601-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18C601-IL PDF datasheet #2
- PIC18C601-IL PDF datasheet #3
- PIC18C601-IL PDF datasheet #4
- Current page: 144 of 320
- Download datasheet (6Mb)
PIC18C601/801
14.4
In Compare mode, the 16-bit CCPR1 (CCPR2) register
value is constantly compared against either the TMR1
register pair value, or the TMR3 register pair value.
When a match occurs, the RC2/CCP1 (RC1/CCP2) pin
can have one of the following actions:
• Driven high
• Driven low
• Toggle output (high to low or low to high)
• Remains unchanged
The action on the pin is based on the value of control
bits CCP1M3:CCP1M0 (CCP2M3:CCP2M0). At the
same time, interrupt flag bit CCP1IF (CCP2IF) is set.
14.4.1
The user must configure the CCPx pin as an output by
clearing the appropriate TRISC bit.
FIGURE 14-2:
DS39541A-page 144
Note:
Special Event Trigger will:
Compare Mode
Note:
RC2/CCP1
pin
RC1/CCP2
pin
Reset Timer1 or Timer3 (but not set Timer1 or Timer3 Interrupt Flag bit)
Set bit GO/DONE, which starts an A/D conversion (CCP2 only)
Clearing the CCP1CON register will force
the RC2/CCP1 compare output latch to the
default low level. This is not the data latch.
CCP PIN CONFIGURATION
Output Enable
Output Enable
I/O pins have diode protection to V
TRISC<2>
TRISC<1>
COMPARE MODE OPERATION BLOCK DIAGRAM
Q
Q
R
R
S
S
Special Event Trigger
Special Event Trigger
CCP1M3:CCP1M0
Mode Select
CCP2M3:CCP2M0
Mode Select
Output
Output
Logic
Logic
DD
Advance Information
and V
SS
Set Flag bit CCP1IF
Set Flag bit CCP2IF
.
Match
Match
14.4.2
Timer1 and/or Timer3 must be running in Timer mode,
or Synchronized Counter mode, if the CCP module is
using the compare feature. In Asynchronous Counter
mode, the compare operation may not work.
14.4.3
When Generate Software Interrupt is chosen, the
CCP1 pin is not affected. Only a CCP interrupt is gen-
erated (if enabled).
14.4.4
In this mode, an internal hardware trigger is generated,
which may be used to initiate an action.
The special event trigger output of CCP1 resets the
TMR1 register pair. This allows the CCPR1 register to
effectively be a 16-bit programmable period register for
Timer1.
The special trigger output of CCPx resets either the
TMR1, or TMR3 register pair. Additionally, the CCP2
Special Event Trigger will start an A/D conversion, if the
A/D module is enabled.
Note:
T3CCP1
T3CCP2
TMR1H
The special event trigger from the CCP2
module will not set the Timer1 or Timer3
interrupt flag bits.
TIMER1/TIMER3 MODE SELECTION
SOFTWARE INTERRUPT MODE
SPECIAL EVENT TRIGGER
T3CCP2
TMR1L
CCPR1H CCPR1L
CCPR2H CCPR2L
Comparator
Comparator
0
0
2001 Microchip Technology Inc.
1
1
TMR3H
TMR3L
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