PIC18C601-I/PT Microchip Technology, PIC18C601-I/PT Datasheet - Page 119
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18C601-I/PT
Manufacturer Part Number
PIC18C601-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18C601-IL.pdf
(320 pages)
3.PIC18C601-IL.pdf
(10 pages)
4.PIC18C601-IL.pdf
(10 pages)
Specifications of PIC18C601-I/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
26
Program Memory Type
ROMless
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Processor Series
PIC18C
Core
PIC
Data Bus Width
8 bit
Program Memory Size
256 KB
Data Ram Size
1.5 KB
Interface Type
3-Wire, I2C, SPI, USART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
26
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC18C601I/PT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18C601-I/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
Company:
Part Number:
PIC18C601-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18C601-IL PDF datasheet #2
- PIC18C601-IL PDF datasheet #3
- PIC18C601-IL PDF datasheet #4
- Current page: 119 of 320
- Download datasheet (6Mb)
9.7
PORTG is a 5-bit wide, bi-directional port. The corre-
sponding data direction register is TRISG. Setting a
TRISG bit (= 1) will make the corresponding PORTG
pin an input (i.e., put the corresponding output driver in
a Hi-Impedance mode). Clearing a TRISG bit (= 0) will
make the corresponding PORTG pin an output (i.e., put
the contents of the output latch on the selected pin).
Read-modify-write operations on the LATG register
read and write the latched output value for PORTG.
PORTG is multiplexed with system bus control signals
ALE, OE, WRH, WRL and BA0. The WRH signal is the
only signal that is disabled and configured as a port pin
(RG3) during external program execution in 8-bit mode.
All other pins are by default, system bus control sig-
nals. PORTG can be configured as an I/O port by set-
ting EBDIS bit in the MEMCON register and when
execution is taking place in internal program RAM.
EXAMPLE 9-8:
CLRF
CLRF
MOVLW
MOVWF
Note:
2001 Microchip Technology Inc.
PORTG, LATG, and TRISG
Registers
PORTG
LATG
04h
TRISG
On Power-on Reset, PORTG defaults to
system bus signals.
INITIALIZING PORTG
; Initialize PORTG by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RG1:RG0 as outputs
; RG2 as input
; RG4:RG3 as outputs
Advance Information
FIGURE 9-14:
WR TRISG
WR LATG
or
PORTG
Note 1: I/O pins have diode protection to V
Data
Bus
RD PORTG
PIC18C601/801
Data Latch
TRIS Latch
RD LATG
D
D
CK
CK
RD TRISG
Q
PORTG BLOCK DIAGRAM
IN I/O MODE
Q
Q
EN
EN
Schmitt
Trigger
Input
Buffer
DS39541A-page 119
D
DD
and V
I/O pin
SS
.
(1)
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