P89LPC9401FBD NXP Semiconductors, P89LPC9401FBD Datasheet - Page 41

• Manufacturer Part Number: P89LPC9401FBD
• Description: IC, MCU 8BIT 80C51, LCD DRIVER, SMD
• Manufacturer: NXP Semiconductors

Specifications of P89LPC9401FBD

• Controller Family/series: (8051) 8052
• Core Size: 8bit
• No. Of I/o's: 23
• Program Memory Size: 8KB
• Ram Memory Size: 256Byte
• Cpu Speed: 18MHz
• Oscillator Type: External, Internal
• No. Of Timers: 4
• No.: RoHS Compliant

Philips Semiconductors
P89LPC9401_1
Preliminary data sheet
7.27.5 Flash programming and erasing
7.27.6 In-circuit programming
7.27.7 In-application programming
7.27.8 In-system programming
Four different methods of erasing or programming of the flash are available. The flash may
be programmed or erased in the end-user application (IAP) under control of the
application’s firmware. Another option is to use the ICP mechanism. This ICP system
provides for programming through a serial clock - serial data interface. As shipped from
the factory, the upper 512 bytes of user code space contains a serial ISP routine allowing
for the device to be programmed in circuit through the serial port. The flash may also be
programmed or erased using a commercially available EPROM programmer which
supports this device. This device does not provide for direct verification of code memory
contents. Instead, this device provides a 32-bit CRC result on either a sector or the entire
user code space.
ICP is performed without removing the microcontroller from the system. The ICP facility
consists of internal hardware resources to facilitate remote programming of the
P89LPC9401 through a two-wire serial interface. The Philips ICP facility has made ICP in
an embedded application—using commercially available programmers—possible with a
minimum of additional expense in components and circuit board area. The ICP function
uses five pins. Only a small connector needs to be available to interface your application
to a commercial programmer in order to use this feature. Additional details may be found
in the P89LPC9401 User manual .
IAP is performed in the application under the control of the microcontroller’s firmware. The
IAP facility consists of internal hardware resources to facilitate programming and erasing.
The Philips IAP has made IAP in an embedded application possible without additional
components. Two methods are available to accomplish IAP. A set of predefined IAP
functions are provided in a Boot ROM and can be called through a common interface,
PGM_MTP. Several IAP calls are available for use by an application program to permit
selective erasing and programming of flash sectors, pages, security bits, configuration
bytes, and device ID. These functions are selected by setting up the microcontroller’s
registers before making a call to PGM_MTP at FF03H. The Boot ROM occupies the
program memory space at the top of the address space from FF00 to FEFFH, thereby not
conflicting with the user program memory space.
In addition, IAP operations can be accomplished through the use of four SFRs consisting
of a control/status register, a data register, and two address registers. Additional details
may be found in the P89LPC9401 User manual .
ISP is performed without removing the microcontroller from the system. The ISP facility
consists of a series of internal hardware resources coupled with internal firmware to
facilitate remote programming of the P89LPC9401 through the serial port. This firmware is
provided by Philips and embedded within each P89LPC9401 device. The Philips ISP
facility has made ISP in an embedded application possible with a minimum of additional
expense in components and circuit board area. The ISP function uses five pins (V
TXD, RXD, and RST). Only a small connector needs to be available to interface your
application to an external circuit in order to use this feature.
8-bit two-clock 80C51 microcontroller with 32 segment
Rev. 01 — 5 September 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
P89LPC9401
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