P89LPC9401FBD NXP Semiconductors, P89LPC9401FBD Datasheet - Page 16

• Manufacturer Part Number: P89LPC9401FBD
• Description: IC, MCU 8BIT 80C51, LCD DRIVER, SMD
• Manufacturer: NXP Semiconductors

Specifications of P89LPC9401FBD

• Controller Family/series: (8051) 8052
• Core Size: 8bit
• No. Of I/o's: 23
• Program Memory Size: 8KB
• Ram Memory Size: 256Byte
• Cpu Speed: 18MHz
• Oscillator Type: External, Internal
• No. Of Timers: 4
• No.: RoHS Compliant

Philips Semiconductors
P89LPC9401_1
Preliminary data sheet
7.3.1 Clock definitions
7.3.2 CPU clock (OSCCLK)
7.3.3 Low speed oscillator option
7.3.4 Medium speed oscillator option
7.3.5 High speed oscillator option
7.2 Enhanced CPU
7.3 Clocks
The P89LPC9401 uses an enhanced 80C51 CPU which runs at six times the speed of
standard 80C51 devices. A machine cycle consists of two CPU clock cycles, and most
instructions execute in one or two machine cycles.
The P89LPC9401 device has several internal clocks as defined below:
OSCCLK — Input to the DIVM clock divider. OSCCLK is selected from one of four clock
sources (see
Section 7.8 “CCLK modification: DIVM
Note: f
CCLK — CPU clock; output of the clock divider. There are two CCLK cycles per machine
cycle, and most instructions are executed in one to two machine cycles (two or four CCLK
cycles).
RCCLK — The internal 7.373 MHz RC oscillator output.
PCLK — Clock for the various peripheral devices and is
The P89LPC9401 provides several user-selectable oscillator options in generating the
CPU clock. This allows optimization for a range of needs from high precision to lowest
possible cost. These options are configured when the flash is programmed and include an
on-chip watchdog oscillator, an on-chip RC oscillator, an oscillator using an external
crystal, or an external clock source. The crystal oscillator can be optimized for low,
medium, or high frequency crystals covering a range from 20 kHz to 18 MHz.
This option supports an external crystal in the range of 20 kHz to 100 kHz. Ceramic
resonators are also supported in this configuration.
This option supports an external crystal in the range of 100 kHz to 4 MHz. Ceramic
resonators are also supported in this configuration.
This option supports an external crystal in the range of 4 MHz to 18 MHz. Ceramic
resonators are also supported in this configuration. When using an oscillator frequency
above 12 MHz, the reset input function of P1.5 must be enabled. An external circuit
is required to hold the device in reset at power-up until V
specified level. When system power is removed V
specified operating voltage. When using an oscillator frequency above 12 MHz, in
some applications, an external brownout detect circuit may be required to hold the
device in reset when V
osc
is defined as the OSCCLK frequency.
Figure
8-bit two-clock 80C51 microcontroller with 32 segment
6) and can also be optionally divided to a slower frequency (see
Rev. 01 — 5 September 2005
DD
falls below the minimum specified operating range.
register”).
DD
will fall below the minimum
CCLK
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
DD
2
P89LPC9401
.
has reached its
4 LCD driver
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