P89LPC9401FBD NXP Semiconductors, P89LPC9401FBD Datasheet - Page 34

IC, MCU 8BIT 80C51, LCD DRIVER, SMD

P89LPC9401FBD

Manufacturer Part Number
P89LPC9401FBD
Description
IC, MCU 8BIT 80C51, LCD DRIVER, SMD
Manufacturer
NXP Semiconductors
Datasheet

Specifications of P89LPC9401FBD

Controller Family/series
(8051) 8052
Core Size
8bit
No. Of I/o's
23
Program Memory Size
8KB
Ram Memory Size
256Byte
Cpu Speed
18MHz
Oscillator Type
External, Internal
No. Of Timers
4
No.
RoHS Compliant

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Philips Semiconductors
P89LPC9401_1
Preliminary data sheet
Fig 15. Comparator input and output connections
7.22.1 Internal reference voltage
7.22.2 Comparator interrupt
7.22.3 Comparators and power reduction modes
7.22 Analog comparators
(P0.5) CMPREF
(P0.4) CIN1A
(P0.3) CIN1B
(P0.2) CIN2A
(P0.1) CIN2B
V
Two analog comparators are provided on the P89LPC9401. Input and output options allow
use of the comparators in a number of different configurations. Comparator operation is
such that the output is a logic 1 (which may be read in a register and/or routed to a pin)
when the positive input (one of two selectable pins) is greater than the negative input
(selectable from a pin or an internal reference voltage). Otherwise the output is a zero.
Each comparator may be configured to cause an interrupt when the output value changes.
The overall connections to both comparators are shown in
function to V
When each comparator is first enabled, the comparator output and interrupt flag are not
guaranteed to be stable for 10 s. The corresponding comparator interrupt should not be
enabled during that time, and the comparator interrupt flag must be cleared before the
interrupt is enabled in order to prevent an immediate interrupt service.
ref(bg)
An internal reference voltage generator may supply a default reference when a single
comparator input pin is used. The value of the internal reference voltage, referred to as
V
Each comparator has an interrupt flag contained in its configuration register. This flag is
set whenever the comparator output changes state. The flag may be polled by software or
may be used to generate an interrupt. The two comparators use one common interrupt
vector. If both comparators enable interrupts, after entering the interrupt service routine,
the user needs to read the flags to determine which comparator caused the interrupt.
Either or both comparators may remain enabled when Power-down or Idle mode is
activated, but both comparators are disabled automatically in Total Power-down mode.
ref(bg)
, is 1.23 V
DD
8-bit two-clock 80C51 microcontroller with 32 segment
= 2.4 V.
CP1
CN1
CP2
CN2
10 %.
Rev. 01 — 5 September 2005
comparator 1
comparator 2
CO1
CO2
change detect
change detect
OE1
OE2
CMF1
CMF2
CMP1 (P0.6)
CMP2 (P0.0)
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Figure
P89LPC9401
002aaa904
15. The comparators
EC
interrupt
4 LCD driver
34 of 59

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